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Date:   Thu, 13 Apr 2023 22:57:29 -0700
From:   Christoph Hellwig <hch@infradead.org>
To:     Kelvin.Cao@microchip.com
Cc:     hch@infradead.org, dmaengine@vger.kernel.org, vkoul@kernel.org,
        George.Ge@microchip.com, linux-kernel@vger.kernel.org,
        logang@deltatee.com
Subject: Re: [PATCH v2 1/1] dmaengine: switchtec-dma: Introduce Switchtec DMA
 engine PCI driver
Message-ID: <ZDjrSVVv8LZDEfQY@infradead.org>
References: <20230403180630.4186061-1-kelvin.cao@microchip.com>
 <20230403180630.4186061-2-kelvin.cao@microchip.com>
 <ZDQ8geSEauTsd2ME@infradead.org>
 <c86fe78f384295d5694b1534efa1f5b070c8123c.camel@microchip.com>
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On Thu, Apr 13, 2023 at 11:22:14PM +0000, Kelvin.Cao@microchip.com wrote:
> On Mon, 2023-04-10 at 18:42 +0200, Christoph Hellwig wrote:
> > 
> > > +???? writew((__force u16)cpu_to_le16(SWITCHTEC_DMA_SQ_SIZE),
> > > +??????????? &swdma_chan->mmio_chan_fw->sq_size);
> > > +???? writew((__force u16)cpu_to_le16(SWITCHTEC_DMA_CQ_SIZE),
> > > +??????????? &swdma_chan->mmio_chan_fw->cq_size);
> > 
> > This looks broken to me, writew always expects cpu endian arguments
> > and byte swaps on big endian systems.
> 
> Do you mean writew assumes the peripherals be little-endian, and will
> do the swap when host is bit-endian?

Yes.  All the standard mmio accessors ({read,write}{b,w,l,q}) do that.

> > But I find the whole pcim_iomap_table concept very confusing to the
> > reader of the driver, and given that it doesn't really use many
> > devm or pcim routines I'd suggest removing them all and sticking to
> > one well understood way of manging resource lifetimes.
> 
> I didn't get it. Do you have specific suggestion?


 - instead of pcim_enable_device call pci_enable_device, and then
   just call pci_disable_device in ->remove and on error
 - instead of pcim_iomap_regions, call pci_request_mem_regions on
   probe, and pci_release_mem_regions on release / fail, and then
   do an ioremap(pci_resource_start(pdev, 1) for the actual bar
   (and iounmap on release/fail) instead of pcim_iomap_table.

> > dma_set_mask_and_coherent for a smaller mask will never succeed when
> > trying to set it to a larger one failed.? So you can remove the
> > second
> > call here.
> 
> By default the kernel assumes the device can address 32-bit address
> space,

Yes.

> I wonder why it wouldn't allow 32-bit mask when it failes 64-
> bit?

The kernel never fails setting a 64-bit DMA mask, it only fails setting
too small masks.