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From:   Neha Malcom Francis <n-francis@ti.com>
To:     <u-boot@lists.denx.de>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
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CC:     <n-francis@ti.com>, <nm@ti.com>, <vigneshr@ti.com>,
        <u-kumar1@ti.com>
Subject: [PATCH 1/3] dt-bindings: misc: esm: Add ESM support for TI K3 devices
Date:   Fri, 14 Apr 2023 16:22:23 +0530
Message-ID: <20230414105225.194195-2-n-francis@ti.com>
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Document the binding for TI K3 ESM (Error Signaling Module) block.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 .../devicetree/bindings/misc/esm-k3.yaml      | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/esm-k3.yaml

diff --git a/Documentation/devicetree/bindings/misc/esm-k3.yaml b/Documentation/devicetree/bindings/misc/esm-k3.yaml
new file mode 100644
index 000000000000..5e637add3b0e
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/esm-k3.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/esm-k3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 ESM Binding
+
+maintainers:
+  - Neha Malcom Francis <n-francis@ti.com>
+
+description: |
+  The ESM (Error Signaling Module) is an IP block on TI K3 devices
+  that allows handling of safety events somewhat similar to what interrupt
+  controller would do. The safety signals have their separate paths within
+  the SoC, and they are handld by the ESM, which routes them to the proper
+  destination, which can be system reset, interrupt controller, etc. In the
+  simplest configuration the signals are just routed to reset the SoC.
+
+properties:
+  compatible:
+    const: ti,j721e-esm
+
+  reg:
+    items:
+      - description: physical address and length of the registers which
+          contain revision and debug features
+      - description: physical address and length of the registers which
+          indicate strapping options
+
+  ti,esm-pins:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description: |
+      integer array of ESM event IDs to route to external event pin which can
+      be used to reset the SoC. The array can have an arbitrary amount of event
+      IDs listed on it.
+    minItems: 1
+    maxItems: 255
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - ti,esm-pins
+
+examples:
+  - |
+    main_esm: esm@700000 {
+        compatible = "ti,j721e-esm";
+        reg = <0x0 0x700000 0x0 0x1000>;
+        ti,esm-pins = <344>, <345>;
+    };
-- 
2.34.1