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Message-ID: <aac210da-dec1-aab8-3f48-c33d9e7687d6@quicinc.com>
Date:   Fri, 14 Apr 2023 08:41:37 -0700
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Subject: Re: [PATCH v2] drm/msm/dpu: always program dsc active bits
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To:     Marijn Suijten <marijn.suijten@somainline.org>,
        Kuogee Hsieh <quic_khsieh@quicinc.com>
CC:     <robdclark@gmail.com>, <sean@poorly.run>, <swboyd@chromium.org>,
        <dianders@chromium.org>, <vkoul@kernel.org>, <daniel@ffwll.ch>,
        <airlied@gmail.com>, <agross@kernel.org>,
        <dmitry.baryshkov@linaro.org>, <andersson@kernel.org>,
        <quic_sbillaka@quicinc.com>, <freedreno@lists.freedesktop.org>,
        <dri-devel@lists.freedesktop.org>, <linux-arm-msm@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
References: <1681401401-15099-1-git-send-email-quic_khsieh@quicinc.com>
 <tgfbdk6q3uool365jqddibnbgq66clsmsm6tldxpm5toqghxpq@m2ic3oonv2s5>
From:   Abhinav Kumar <quic_abhinavk@quicinc.com>
In-Reply-To: <tgfbdk6q3uool365jqddibnbgq66clsmsm6tldxpm5toqghxpq@m2ic3oonv2s5>
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On 4/14/2023 12:48 AM, Marijn Suijten wrote:
> Capitalize DSC in the title, as discussed in v1.
> 
> On 2023-04-13 08:56:41, Kuogee Hsieh wrote:
>> In current code, the DSC active bits are written only if cfg->dsc is set.
>> However, for displays which are hot-pluggable, there can be a use-case
>> of disconnecting a DSC supported sink and connecting a non-DSC sink.
>>
>> For those cases we need to clear DSC active bits during tear down.
>>
>> Changes in V2:
>> 1) correct commit text as suggested
>> 2) correct Fixes commit id
>> 3) add FIXME comment
>>
>> Fixes: 77f6da90487c ("drm/msm/disp/dpu1: Add DSC support in hw_ctl")
>> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
>> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> 
> By default git send-email should pick this up in the CC line...  but I
> had to download this patch from lore once again.
> 

Yes, I think what happened here is, he didnt git am the prev rev and 
make changes on top of that so git send-email didnt pick up. We should 
fix that process.

>> ---
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
>> index bbdc95c..1651cd7 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
>> @@ -541,10 +541,10 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx,
>>   	if (cfg->merge_3d)
>>   		DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE,
>>   			      BIT(cfg->merge_3d - MERGE_3D_0));
>> -	if (cfg->dsc) {
>> -		DPU_REG_WRITE(&ctx->hw, CTL_FLUSH, DSC_IDX);
>> -		DPU_REG_WRITE(c, CTL_DSC_ACTIVE, cfg->dsc);
>> -	}
>> +
>> +	/* FIXME: fix reset_intf_cfg to handle teardown of dsc */
> 
> There's more wrong than just moving (not "fix"ing) this bit of code into
> reset_intf_cfg.  And this will have to be re-wrapped in `if (cfg->dsc)`
> again by reverting this patch.  Perhaps that can be explained, or link
> to Abhinav's explanation to make it clear to readers what this FIXME
> actually means?  Let's wait for Abhinav and Dmitry to confirm the
> desired communication here.
> 
> https://lore.kernel.org/linux-arm-msm/ec045d6b-4ffd-0f8c-4011-8db45edc6978@quicinc.com/
> 

Yes, I am fine with linking this explanation in the commit text and 
mentioning that till thats fixed, we need to go with this solution. The 
FIXME itself is fine, I will work on it and I remember this context well.

> - Marijn
> 
>> +	DPU_REG_WRITE(&ctx->hw, CTL_FLUSH, DSC_IDX);
>> +	DPU_REG_WRITE(c, CTL_DSC_ACTIVE, cfg->dsc);
>>   }
>>   
>>   static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx,
>> -- 
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> a Linux Foundation Collaborative Project
>>