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bh=ZRTjTCycaHpBoU3Ym49sFGw6ZqxWkZq2ouAKqZjTUf0=; b=bxft8csHbyKuzjhDcsvpXOGhpVw9h4G47KH6ZH+YyQElK0Ce/MijJa1DWhbp/x5bZh HsABxOIEAN37EVBwsN2Tq19bghNXVyO9a1B1ckQBpzWWEjPrN89VP0CS9NG5+N+FLYUK l45UmO0tCSHSfhRRqHjzaN29vjFVoju7scQkPNI4ZhWmyUU1hHDwBC6C5PCDkVwzDMtS VAClsMQcH8bIlNEHxg8aWV0As8wQK3XVWFgjRi113BhEiVNW8gVDOy21lhenjNbG+ksz UgJzsDV8ZvCqdv5LobXxiOaMYDfctfM8QoYrXffeKTR/riFQ7tlFKxh8VXBF2V5GlxIa Drpg== X-Gm-Message-State: AAQBX9fzvu8Z1sdHVLe1IkOxRFLdqhK7RAdU4FdogZoFlBDjSqC3Eeps 2GY2mbB2A3m68Z4yzSfiJ0cVrJsHA9a1rAfMJV4sLw== X-Received: by 2002:a05:6512:408:b0:4ec:90b2:b514 with SMTP id u8-20020a056512040800b004ec90b2b514mr1874854lfk.6.1681716437538; Mon, 17 Apr 2023 00:27:17 -0700 (PDT) MIME-Version: 1.0 References: <20230327125316.210812-1-brgl@bgdev.pl> <20230327125316.210812-4-brgl@bgdev.pl> <3877cb9e-9647-0acf-f705-d34fe2c731ff@linaro.org> In-Reply-To: <3877cb9e-9647-0acf-f705-d34fe2c731ff@linaro.org> From: Bartosz Golaszewski Date: Mon, 17 Apr 2023 09:27:04 +0200 Message-ID: Subject: Re: [PATCH v3 03/18] dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p To: Krzysztof Kozlowski Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski , Thomas Gleixner , Marc Zyngier Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Apr 16, 2023 at 5:04=E2=80=AFPM Krzysztof Kozlowski wrote: > > On 14/04/2023 11:33, Bartosz Golaszewski wrote: > > On Thu, Apr 6, 2023 at 4:10=E2=80=AFPM Bartosz Golaszewski wrote: > >> > >> On Mon, Mar 27, 2023 at 2:53=E2=80=AFPM Bartosz Golaszewski wrote: > >>> > >>> From: Bartosz Golaszewski > >>> > >>> Add a compatible for the Power Domain Controller on SA8775p platforms= . > >>> Increase the number of PDC pin mappings. > >>> > >>> Signed-off-by: Bartosz Golaszewski > >>> Cc: Thomas Gleixner > >>> Cc: Marc Zyngier > >>> --- > >>> .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 3 += +- > >>> 1 file changed, 2 insertions(+), 1 deletion(-) > >>> > >>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/q= com,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,= pdc.yaml > >>> index 94791e261c42..641ff32e4a6c 100644 > >>> --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc= .yaml > >>> +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc= .yaml > >>> @@ -26,6 +26,7 @@ properties: > >>> compatible: > >>> items: > >>> - enum: > >>> + - qcom,sa8775p-pdc > >>> - qcom,sc7180-pdc > >>> - qcom,sc7280-pdc > >>> - qcom,sc8280xp-pdc > >>> @@ -53,7 +54,7 @@ properties: > >>> qcom,pdc-ranges: > >>> $ref: /schemas/types.yaml#/definitions/uint32-matrix > >>> minItems: 1 > >>> - maxItems: 32 # no hard limit > >>> + maxItems: 38 # no hard limit > > I don't think the limit is correct. I still see warnings with this > patch. We already have 57 elements, so limit should be I guess 128 or > something. > You mean for other platforms? This limit applies to sa8775p as the goal of the patch is to add its own PDC compatible. If other platforms have more interrupts then we need to fix it first with a separate commit IMO. I'll send out two patches for that. Brt