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From:   Sudeep Holla <sudeep.holla@arm.com>
To:     linux-kernel@vger.kernel.org, Radu Rendec <rrendec@redhat.com>
Cc:     Sudeep Holla <sudeep.holla@arm.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Pierre Gondois <Pierre.Gondois@arm.com>,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 0/3] arch_topology: Pre-allocate cacheinfo from primary CPU
Date:   Mon, 17 Apr 2023 15:07:40 +0100
Message-Id: <168174033569.1898335.12120283777353899091.b4-ty@arm.com>
In-Reply-To: <20230412185759.755408-1-rrendec@redhat.com>
References: <20230412185759.755408-1-rrendec@redhat.com>
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On Wed, 12 Apr 2023 14:57:56 -0400, Radu Rendec wrote:
> Commit 5944ce092b97 ("arch_topology: Build cacheinfo from primary CPU")
> tries to build the cacheinfo from the primary CPU prior to secondary
> CPUs boot, if the DT/ACPI description contains cache information.
> However, if such information is not present, it still reverts to the old
> behavior, which allocates the cacheinfo memory on each secondary CPU. On
> RT kernels, this triggers a "BUG: sleeping function called from invalid
> context" because the allocation is done before preemption is first
> enabled on the secondary CPU.
> 
> [...]

Applied to sudeep.holla/linux (for-next/cacheinfo), thanks!

[1/3] cacheinfo: Add arch specific early level initializer
      https://git.kernel.org/sudeep.holla/c/6539cffa9495
[2/3] cacheinfo: Add arm64 early level initializer implementation
      https://git.kernel.org/sudeep.holla/c/c931680cfa95
[3/3] cacheinfo: Allow early level detection when DT/ACPI info is missing/broken
      https://git.kernel.org/sudeep.holla/c/e103d55465db

--
Regards,
Sudeep