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From:   Mark Brown <broonie@kernel.org>
To:     Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Cc:     linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
        git@amd.com, saikrishna12468@gmail.com
In-Reply-To: <20230320095931.2651714-1-sai.krishna.potthuri@amd.com>
References: <20230320095931.2651714-1-sai.krishna.potthuri@amd.com>
Subject: Re: [PATCH 0/2] spi: cadence-quadspi: Fix random issues with
 Xilinx Versal DMA read
Message-Id: <168175970492.1284440.7735201840102180045.b4-ty@kernel.org>
Date:   Mon, 17 Apr 2023 20:28:24 +0100
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Precedence: bulk

On Mon, 20 Mar 2023 15:29:29 +0530, Sai Krishna Potthuri wrote:
> Update Xilinx Versal external DMA read logic to fix random issues
> - Instead of having the fixed timeout, update the read timeout based on
> the length of the transfer to avoid timeout for larger data size.
> - While switching between external DMA read and indirect read, disable the
> SPI before configuration and enable it after configuration as recommended
> by Octal-SPI Flash Controller specification.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] spi: cadence-quadspi: Update the read timeout based on the length
      commit: 22c8ce0aa274cea2ff538ffdf723053ecf77d78b
[2/2] spi: cadence-quadspi: Disable the SPI before reconfiguring
      commit: c0b53f4e545e4c6106aab553eb351138d46211cc

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark