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Date:   Tue, 18 Apr 2023 07:31:47 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Hal Feng <hal.feng@starfivetech.com>
CC:     Stephen Boyd <sboyd@kernel.org>, <linux-clk@vger.kernel.org>,
        <oe-kbuild-all@lists.linux.dev>, <linux-mm@kvack.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Paul Gazzillo <paul@pgazz.com>,
        Necip Fazil Yildiran <fazilyildiran@gmail.com>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        Xingyu Wu <xingyu.wu@starfivetech.com>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 1/2] clk: starfive: Fix RESET_STARFIVE_JH7110 can't be
 selected in a specified case
Message-ID: <20230418-caliber-clavicle-e8c1beb3fb75@wendy>
References: <20230417074115.30786-1-hal.feng@starfivetech.com>
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On Tue, Apr 18, 2023 at 10:14:06AM +0800, Hal Feng wrote:
> On Mon, 17 Apr 2023 17:22:01 -0700, Stephen Boyd wrote:
> > Quoting Conor Dooley (2023-04-17 03:18:35)

> >> Aye, just the explicit dependency seems like it'd be less fragile and
> >> more obvious in the future.
> >=20
> > Agreed. Be explicit so we don't have to hunt down select dependencies.
>=20
> With further consideration, on the other hand, if we set `if ARCH_STARFIV=
E`
> here, it can point out that we need the reset driver to boot up JH7110
> besides the clock drivers, and the reset driver is not a necessary option
> for compilation test. So the reset driver is independent to the clock
> drivers when you doing a compilation test.

If ARCH_STARFIVE is enabled, both options (RESET_CONTROLLER &
RESET_STARFIVE_JH7110) will be selected & you don't need to worry about
people not realising this. Try it out & look at the option in
menuconfig.

> If we set `if RESET_CONTROLLER` here, the reset driver will be compiled
> automatically when (ARCH_STARFIVE [=3Dn] && COMPILE_TEST [=3Dy] &&=20
> RESET_CONTROLLER [=3Dy] && CLK_STARFIVE_JH7110_SYS [=3Dy]).

This is what we want, right? The more often it gets built by randconfig
etc the better, especially for archs that are not RISC-V.

Cheers,
Conor.

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