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Date:   Tue, 18 Apr 2023 10:38:51 +0300
From:   Andy Shevchenko <andriy.shevchenko@intel.com>
To:     Joy Chakraborty <joychakr@google.com>
Cc:     Serge Semin <fancer.lancer@gmail.com>,
        Mark Brown <broonie@kernel.org>, linux-spi@vger.kernel.org,
        linux-kernel@vger.kernel.org, manugautam@google.com,
        rohitner@google.com
Subject: Re: [PATCH v7 4/5] spi: dw: Add DMA address widths capability check
Message-ID: <ZD5JC7BdN1usn6Kd@smile.fi.intel.com>
References: <20230418052902.1336866-1-joychakr@google.com>
 <20230418052902.1336866-5-joychakr@google.com>
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On Tue, Apr 18, 2023 at 05:29:01AM +0000, Joy Chakraborty wrote:
> Store address width capabilities of DMA controller during init and check
> the same per transfer to make sure the bits/word requirement can be met.
> 
> Current DW DMA driver requires both tx and rx channel to be configured
> and functional hence a subset of both tx and rx channel address width
> capability is checked with the width requirement(n_bytes) for a
> transfer.

...

> +	/*
> +	 * Assuming both channels belong to the same DMA controller hence the
> +	 * address width capabilities most likely would be the same.
> +	 */

I had a small comment on this In v6 thread.

-- 
With Best Regards,
Andy Shevchenko