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Message-ID: <a8a9e82b-996e-2b0d-4e3b-9ceda0ab81e4@gmail.com>
Date:   Tue, 18 Apr 2023 13:29:51 +0200
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Subject: Re: [PATCH 3/3] arm64: dts: rockchip: Add rk3588 timer
To:     Cristian Ciocaltea <cristian.ciocaltea@collabora.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Heiko Stuebner <heiko@sntech.de>,
        Sebastian Reichel <sebastian.reichel@collabora.com>,
        Sugar Zhang <sugar.zhang@rock-chips.com>,
        Shreeya Patel <shreeya.patel@collabora.com>,
        Kever Yang <kever.yang@rock-chips.com>
Cc:     linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-rockchip@lists.infradead.org, kernel@collabora.com
References: <20230418095344.274025-1-cristian.ciocaltea@collabora.com>
 <20230418095344.274025-4-cristian.ciocaltea@collabora.com>
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From:   Johan Jonker <jbx6244@gmail.com>
In-Reply-To: <20230418095344.274025-4-cristian.ciocaltea@collabora.com>
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On 4/18/23 11:53, Cristian Ciocaltea wrote:
> Add DT node for Rockchip RK3588/RK3588S SoC timer.
> 
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 657c019d27fa..acd89a55374a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -1400,6 +1400,14 @@ i2c5: i2c@fead0000 {
>  		status = "disabled";
>  	};
>  

> +	rktimer: timer@feae0000 {

There are multiple timers.
Use a label in line with the TRM.
Maybe change your label to "timer0" in that trend?

> +		compatible = "rockchip,rk3588-timer", "rockchip,rk3288-timer";
> +		reg = <0x0 0xfeae0000 0x0 0x20>;

> +		clocks = <&cru PCLK_BUSTIMER0>, <&cru CLK_BUSTIMER0>;
> +		clock-names = "pclk", "timer";
> +		interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH 0>;

Heiko's sort rules:

compatible
reg
interrupts
[alphabetical]
status [if needed]

> +	};
> +
>  	wdt: watchdog@feaf0000 {
>  		compatible = "rockchip,rk3588-wdt", "snps,dw-wdt";
>  		reg = <0x0 0xfeaf0000 0x0 0x100>;