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Tue, 18 Apr 2023 12:10:51 -0700 (PDT) X-Received: by 2002:ac8:5a87:0:b0:3bf:db0a:c105 with SMTP id c7-20020ac85a87000000b003bfdb0ac105mr1893744qtc.6.1681845051494; Tue, 18 Apr 2023 12:10:51 -0700 (PDT) MIME-Version: 1.0 References: <20230406082018.70367-1-leobras@redhat.com> <20230406082018.70367-2-leobras@redhat.com> In-Reply-To: From: Leonardo Bras Soares Passos Date: Tue, 18 Apr 2023 16:10:40 -0300 Message-ID: Subject: Re: [RFC PATCH v1 1/2] riscv/cmpxchg: Deduplicate cmpxchg() asm and macros To: Guo Ren Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrea Parri , Conor Dooley , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 7, 2023 at 5:29=E2=80=AFAM Guo Ren wrote: > > On Thu, Apr 6, 2023 at 4:20=E2=80=AFPM Leonardo Bras = wrote: > > > > In this header every cmpxchg define (_relaxed, _acquire, _release, > > vanilla) contain it's own asm file, both for 4-byte variables an 8-byte > > variables, on a total of 8 versions of mostly the same asm. > > > > This is usually bad, as it means any change may be done in up to 8 > > different places. > > > > Unify those versions by creating a new define with enough parameters to > > generate any version of the previous 8. > > > > Then unify the result under a more general define, and simplify > > arch_cmpxchg* generation > > > > (This did not cause any change in generated asm) > > > > Signed-off-by: Leonardo Bras > > --- > > arch/riscv/include/asm/cmpxchg.h | 184 ++++++------------------------- > > 1 file changed, 36 insertions(+), 148 deletions(-) > > > > diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/= cmpxchg.h > > index 12debce235e52..f88fae357071c 100644 > > --- a/arch/riscv/include/asm/cmpxchg.h > > +++ b/arch/riscv/include/asm/cmpxchg.h > > @@ -163,51 +163,23 @@ > > * store NEW in MEM. Return the initial value in MEM. Success is > > * indicated by comparing RETURN with OLD. > > */ > > -#define __cmpxchg_relaxed(ptr, old, new, size) = \ > > -({ = \ > > - __typeof__(ptr) __ptr =3D (ptr); = \ > > - __typeof__(*(ptr)) __old =3D (old); = \ > > - __typeof__(*(ptr)) __new =3D (new); = \ > > - __typeof__(*(ptr)) __ret; = \ > > - register unsigned int __rc; = \ > > - switch (size) { = \ > > - case 4: = \ > > - __asm__ __volatile__ ( = \ > > - "0: lr.w %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.w %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" ((long)__old), "rJ" (__new) = \ > > - : "memory"); = \ > > - break; = \ > > - case 8: = \ > > - __asm__ __volatile__ ( = \ > > - "0: lr.d %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.d %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" (__old), "rJ" (__new) = \ > > - : "memory"); = \ > > - break; = \ > > - default: = \ > > - BUILD_BUG(); = \ > > - } = \ > > - __ret; = \ > > -}) > > > > -#define arch_cmpxchg_relaxed(ptr, o, n) = \ > > +#define ____cmpxchg(lr_sfx, sc_sfx, prepend, append, r, rc, p, co, o, = n)\ > > ({ = \ > > - __typeof__(*(ptr)) _o_ =3D (o); = \ > > - __typeof__(*(ptr)) _n_ =3D (n); = \ > > - (__typeof__(*(ptr))) __cmpxchg_relaxed((ptr), = \ > > - _o_, _n_, sizeof(*(ptr))); = \ > > + __asm__ __volatile__ ( = \ > > + prepend = \ > > + "0: lr" lr_sfx " %0, %2\n" = \ > > + " bne %0, %z3, 1f\n" = \ > > + " sc" sc_sfx " %1, %z4, %2\n" = \ > > + " bnez %1, 0b\n" = \ > > + append = \ > > + "1:\n" = \ > > + : "=3D&r" (r), "=3D&r" (rc), "+A" (*(p)) = \ > > + : "rJ" (co o), "rJ" (n) = \ > > + : "memory"); = \ > > }) > > > > -#define __cmpxchg_acquire(ptr, old, new, size) = \ > > +#define ___cmpxchg(ptr, old, new, size, sc_sfx, prepend, append) = \ > > ({ = \ > > __typeof__(ptr) __ptr =3D (ptr); = \ > > __typeof__(*(ptr)) __old =3D (old); = \ > > @@ -216,28 +188,12 @@ > > register unsigned int __rc; = \ > > switch (size) { = \ > > case 4: = \ > > - __asm__ __volatile__ ( = \ > > - "0: lr.w %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.w %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - RISCV_ACQUIRE_BARRIER = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" ((long)__old), "rJ" (__new) = \ > > - : "memory"); = \ > > + ____cmpxchg(".w", ".w" sc_sfx, prepend, append, = \ > > + __ret, __rc, __ptr, (long), __old, __new); = \ > > break; = \ > > case 8: = \ > > - __asm__ __volatile__ ( = \ > > - "0: lr.d %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.d %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - RISCV_ACQUIRE_BARRIER = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" (__old), "rJ" (__new) = \ > > - : "memory"); = \ > > + ____cmpxchg(".d", ".d" sc_sfx, prepend, append, = \ > > + __ret, __rc, __ptr, /**/, __old, __new); = \ > > break; = \ > > default: = \ > > BUILD_BUG(); = \ > > @@ -245,105 +201,37 @@ > > __ret; = \ > > }) > > > > -#define arch_cmpxchg_acquire(ptr, o, n) = \ > > +#define __cmpxchg_relaxed(ptr, old, new, size) = \ > > + ___cmpxchg(ptr, old, new, size, "", "", "") > > + > > +#define _arch_cmpxchg(order, ptr, o, n) = \ > > ({ = \ > > __typeof__(*(ptr)) _o_ =3D (o); = \ > > __typeof__(*(ptr)) _n_ =3D (n); = \ > > - (__typeof__(*(ptr))) __cmpxchg_acquire((ptr), = \ > > - _o_, _n_, sizeof(*(ptr))); = \ > > + (__typeof__(*(ptr))) __cmpxchg ## order((ptr), _o_, _n_, = \ > > + sizeof(*(ptr))); = \ > > }) > > > > +#define arch_cmpxchg_relaxed(ptr, o, n) = \ > > + _arch_cmpxchg(_relaxed, ptr, o, n) > > + > > +#define __cmpxchg_acquire(ptr, old, new, size) = \ > > + ___cmpxchg(ptr, old, new, size, "", "", RISCV_ACQUIRE_BARRIER) > > + > > +#define arch_cmpxchg_acquire(ptr, o, n) = \ > > + _arch_cmpxchg(_acquire, ptr, o, n) > > + > > #define __cmpxchg_release(ptr, old, new, size) = \ > > -({ = \ > > - __typeof__(ptr) __ptr =3D (ptr); = \ > > - __typeof__(*(ptr)) __old =3D (old); = \ > > - __typeof__(*(ptr)) __new =3D (new); = \ > > - __typeof__(*(ptr)) __ret; = \ > > - register unsigned int __rc; = \ > > - switch (size) { = \ > > - case 4: = \ > > - __asm__ __volatile__ ( = \ > > - RISCV_RELEASE_BARRIER = \ > > - "0: lr.w %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.w %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" ((long)__old), "rJ" (__new) = \ > > - : "memory"); = \ > > - break; = \ > > - case 8: = \ > > - __asm__ __volatile__ ( = \ > > - RISCV_RELEASE_BARRIER = \ > > - "0: lr.d %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.d %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" (__old), "rJ" (__new) = \ > > - : "memory"); = \ > > - break; = \ > > - default: = \ > > - BUILD_BUG(); = \ > > - } = \ > > - __ret; = \ > > -}) > > + ___cmpxchg(ptr, old, new, size, "", RISCV_RELEASE_BARRIER, "") > > > > #define arch_cmpxchg_release(ptr, o, n) = \ > > -({ = \ > > - __typeof__(*(ptr)) _o_ =3D (o); = \ > > - __typeof__(*(ptr)) _n_ =3D (n); = \ > > - (__typeof__(*(ptr))) __cmpxchg_release((ptr), = \ > > - _o_, _n_, sizeof(*(ptr))); = \ > > -}) > > + _arch_cmpxchg(_release, ptr, o, n) > > > > #define __cmpxchg(ptr, old, new, size) = \ > > -({ = \ > > - __typeof__(ptr) __ptr =3D (ptr); = \ > > - __typeof__(*(ptr)) __old =3D (old); = \ > > - __typeof__(*(ptr)) __new =3D (new); = \ > > - __typeof__(*(ptr)) __ret; = \ > > - register unsigned int __rc; = \ > > - switch (size) { = \ > > - case 4: = \ > > - __asm__ __volatile__ ( = \ > > - "0: lr.w %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.w.rl %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - " fence rw, rw\n" = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" ((long)__old), "rJ" (__new) = \ > > - : "memory"); = \ > > - break; = \ > > - case 8: = \ > > - __asm__ __volatile__ ( = \ > > - "0: lr.d %0, %2\n" = \ > > - " bne %0, %z3, 1f\n" = \ > > - " sc.d.rl %1, %z4, %2\n" = \ > > - " bnez %1, 0b\n" = \ > > - " fence rw, rw\n" = \ > > - "1:\n" = \ > > - : "=3D&r" (__ret), "=3D&r" (__rc), "+A" (*__ptr= ) \ > > - : "rJ" (__old), "rJ" (__new) = \ > > - : "memory"); = \ > > - break; = \ > > - default: = \ > > - BUILD_BUG(); = \ > > - } = \ > > - __ret; = \ > > -}) > > + ___cmpxchg(ptr, old, new, size, ".rl", "", " fence rw, rw\n"= ) > > > > #define arch_cmpxchg(ptr, o, n) = \ > > -({ = \ > > - __typeof__(*(ptr)) _o_ =3D (o); = \ > > - __typeof__(*(ptr)) _n_ =3D (n); = \ > > - (__typeof__(*(ptr))) __cmpxchg((ptr), = \ > > - _o_, _n_, sizeof(*(ptr))); = \ > > -}) > > + _arch_cmpxchg(, ptr, o, n) > > > > #define arch_cmpxchg_local(ptr, o, n) = \ > > (__cmpxchg_relaxed((ptr), (o), (n), sizeof(*(ptr)))) > > -- > > 2.40.0 > > > One patch is much easier to review :) > > Reviewed-by: Guo Ren > > -- > Best Regards > Guo Ren > Thanks!