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([2a02:810d:15c0:828:62f5:eb43:f726:5fee]) by smtp.gmail.com with ESMTPSA id hv14-20020a17090760ce00b0095251a3d66fsm2022814ejc.119.2023.04.19.01.21.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Apr 2023 01:21:08 -0700 (PDT) Message-ID: <88e74f8f-feee-159a-3048-736a5ffc13cd@linaro.org> Date: Wed, 19 Apr 2023 10:21:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v2 4/4] spi: s3c64xx: support interrupt based pio mode Content-Language: en-US To: Jaewon Kim , Mark Brown , Andi Shyti , Alim Akhtar Cc: linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chanho Park References: <20230419060639.38853-1-jaewon02.kim@samsung.com> <20230419060639.38853-5-jaewon02.kim@samsung.com> From: Krzysztof Kozlowski In-Reply-To: <20230419060639.38853-5-jaewon02.kim@samsung.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19/04/2023 08:06, Jaewon Kim wrote: > Interrupt based pio mode is supported to reduce CPU load. > If transfer size is larger than 32 byte, it is processed using interrupt. > > Signed-off-by: Jaewon Kim > --- > drivers/spi/spi-s3c64xx.c | 82 ++++++++++++++++++++++++++++++++------- > 1 file changed, 67 insertions(+), 15 deletions(-) > > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c > index cf3060b2639b..ce1afb9a4ed4 100644 > --- a/drivers/spi/spi-s3c64xx.c > +++ b/drivers/spi/spi-s3c64xx.c > @@ -58,6 +58,8 @@ > #define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD (1<<17) > #define S3C64XX_SPI_MODE_BUS_TSZ_WORD (2<<17) > #define S3C64XX_SPI_MODE_BUS_TSZ_MASK (3<<17) > +#define S3C64XX_SPI_MODE_RX_RDY_LVL GENMASK(16, 11) > +#define S3C64XX_SPI_MODE_RX_RDY_LVL_SHIFT 11 > #define S3C64XX_SPI_MODE_SELF_LOOPBACK (1<<3) > #define S3C64XX_SPI_MODE_RXDMA_ON (1<<2) > #define S3C64XX_SPI_MODE_TXDMA_ON (1<<1) > @@ -114,6 +116,8 @@ > > #define S3C64XX_SPI_TRAILCNT S3C64XX_SPI_MAX_TRAILCNT > > +#define S3C64XX_SPI_POLLING_SIZE 32 > + > #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) > #define is_polling(x) (x->cntrlr_info->polling) > > @@ -552,10 +556,11 @@ static int s3c64xx_wait_for_dma(struct s3c64xx_spi_driver_data *sdd, > } > > static int s3c64xx_wait_for_pio(struct s3c64xx_spi_driver_data *sdd, > - struct spi_transfer *xfer) > + struct spi_transfer *xfer, int use_irq) > { > void __iomem *regs = sdd->regs; > unsigned long val; > + unsigned long time; > u32 status; > int loops; > u32 cpy_len; > @@ -563,17 +568,24 @@ static int s3c64xx_wait_for_pio(struct s3c64xx_spi_driver_data *sdd, > int ms; > u32 tx_time; > > - /* sleep during signal transfer time */ > - status = readl(regs + S3C64XX_SPI_STATUS); > - if (RX_FIFO_LVL(status, sdd) < xfer->len) { > - tx_time = (xfer->len * 8 * 1000 * 1000) / sdd->cur_speed; > - usleep_range(tx_time / 2, tx_time); > - } You just added this code. Adding and immediately removing it, suggests this should be one patch. Best regards, Krzysztof