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([2a02:810d:15c0:828:976c:1d6c:6ed0:8935]) by smtp.gmail.com with ESMTPSA id v15-20020a17090606cf00b0095336e8e012sm1922174ejb.176.2023.04.19.13.01.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Apr 2023 13:01:26 -0700 (PDT) Message-ID: <172c46b7-256e-b09d-3940-880fa8989b49@linaro.org> Date: Wed, 19 Apr 2023 22:01:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v5 06/11] dt-bindings: PCI: Update the RK3399 example to a valid one Content-Language: en-US To: Rick Wertenbroek , alberto.dassatti@heig-vd.ch Cc: xxm@rock-chips.com, dlemoal@kernel.org, Shawn Lin , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Heiko Stuebner , Caleb Connolly , Corentin Labbe , Brian Norris , Johan Jonker , Judy Hsiao , Sascha Hauer , Hugh Cole-Baker , Arnaud Ferraris , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20230418074700.1083505-1-rick.wertenbroek@gmail.com> <20230418074700.1083505-7-rick.wertenbroek@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20230418074700.1083505-7-rick.wertenbroek@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/04/2023 09:46, Rick Wertenbroek wrote: > Update the example in the documentation to a valid example. > Address for mem-base was invalid, it pointed to address > 0x8000'0000 which is the upper region of the DDR which > is not necessarily populated depending on the board. > This address should point to the base of the memory > window region of the controller which is 0xfa00'0000. > Add missing pinctrl. > > Signed-off-by: Rick Wertenbroek > --- > .../devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml > index 88386a6d7011..6b62f6f58efe 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml > @@ -47,7 +47,7 @@ examples: > > pcie-ep@f8000000 { > compatible = "rockchip,rk3399-pcie-ep"; > - reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0x80000000 0x0 0x20000>; > + reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0xfa000000 0x0 0x2000000>; > reg-names = "apb-base", "mem-base"; > clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, > <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; > @@ -63,6 +63,8 @@ examples: > phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; > phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3"; > rockchip,max-outbound-regions = <16>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_clkreqnb_cpm>; This is just example of the binding, you do not need to fill all unrelated (generic) properties like pinctrl. Acked-by: Krzysztof Kozlowski Best regards, Krzysztof