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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id l13-20020ac24a8d000000b004eb3b6acfe6sm311735lfp.213.2023.04.20.12.51.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Apr 2023 12:51:22 -0700 (PDT) Message-ID: <0f469b3c-5f0f-e027-8a9f-d1233169c04a@linaro.org> Date: Thu, 20 Apr 2023 22:51:22 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 0/2] DPU1 GC1.8 wiring-up Content-Language: en-GB To: Abhinav Kumar , Konrad Dybcio , Rob Clark , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20230420-topic-dpu_gc-v1-0-d9d1a5e40917@linaro.org> <5b133c55-e4f5-bfd2-b542-a7d44313c038@linaro.org> <3f3b3637-ed85-09a1-22b7-3ccd4bc929bb@quicinc.com> <2dff9d62-cffe-c66f-9e50-3ecd64e44d37@linaro.org> <6a335df7-ff0b-098a-feec-45714159df04@linaro.org> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/04/2023 22:47, Abhinav Kumar wrote: > > > On 4/20/2023 11:01 AM, Dmitry Baryshkov wrote: >> On 20/04/2023 04:36, Konrad Dybcio wrote: >>> >>> >>> On 20.04.2023 03:28, Abhinav Kumar wrote: >>>> >>>> >>>> On 4/19/2023 6:26 PM, Konrad Dybcio wrote: >>>>> >>>>> >>>>> On 20.04.2023 03:25, Dmitry Baryshkov wrote: >>>>>> On 20/04/2023 04:14, Konrad Dybcio wrote: >>>>>>> Almost all SoCs from SDM845 to SM8550 inclusive feature a GC1.8 >>>>>>> dspp sub-block in addition to PCCv4. The other block differ a bit >>>>>>> more, but none of them are supported upstream. >>>>>>> >>>>>>> This series adds configures the GCv1.8 on all the relevant SoCs. >>>>>> >>>>>> Does this mean that we will see gamma_lut support soon? >>>>> No promises, my plate is not even full, it's beyond overflowing! :P >>>>> >>>>> Konrad >>>> >>>> So I think I wrote about this before during the catalog rework/fixes >>>> that the gc registers are not written to / programmed. >>>> >>>> If thats not done, is there any benefit to this series? >>> Completeness and preparation for the code itself, if nothing else? >> >> The usual problem is that if something is not put to use, it quickly >> rots or becomes misused for newer platforms. We have seen this with >> the some of DPU features. >> >> In case of GC (and the freshly defined DPU_DSPP_IGC, but not used) we >> have three options: >> - drop the unused GC from msm8998_sblk. >> - keep things as is, single unused GC entry >> - fill all the sblk with the correct information in hope that it stays >> correct >> >> Each of these options has its own drawbacks. I have slight bias >> towards the last option, to have the information in place (as long as >> it is accurate). >> > > My vote is for (1) . Today, GC is unused and from the discussion here, > there is no concrete plan to add it. If we keep extending an unused > bitmask for all the chipsets including the ones which will get added in > the future in the hope that someday the feature comes, it doesnt sound > like a good idea. > > I would rather do (1), if someone has time. Agree, this was the second item on my preference list. Could you please send this oneliner? > OR lets stay at (2) till > someone does (1). > > When someone implements GC, we can re-use this patch and that time keep > konrad's author rights or co-developed by. > > -- With best wishes Dmitry