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Date:   Thu, 20 Apr 2023 13:21:28 -0700
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Subject: Re: [RFC 00/48] RISC-V CoVE support
From:   Sean Christopherson <seanjc@google.com>
To:     Atish Kumar Patra <atishp@rivosinc.com>
Cc:     linux-kernel@vger.kernel.org, Alexandre Ghiti <alex@ghiti.fr>,
        Andrew Jones <ajones@ventanamicro.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        Anup Patel <anup@brainfault.org>,
        Atish Patra <atishp@atishpatra.org>,
        "=?iso-8859-1?Q?Bj=F6rn_T=F6pel?=" <bjorn@rivosinc.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
        linux-coco@lists.linux.dev, Dylan Reid <dylan@rivosinc.com>,
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        Christoph Hellwig <hch@infradead.org>,
        Conor Dooley <conor.dooley@microchip.com>,
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        Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>,
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        Paolo Bonzini <pbonzini@redhat.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Rajnesh Kanwal <rkanwal@rivosinc.com>,
        Uladzislau Rezki <urezki@gmail.com>
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On Fri, Apr 21, 2023, Atish Kumar Patra wrote:
> On Thu, Apr 20, 2023 at 10:00=E2=80=AFPM Sean Christopherson <seanjc@goog=
le.com> wrote:
> >
> > On Wed, Apr 19, 2023, Atish Patra wrote:
> > > 2. Lazy gstage page allocation vs upfront allocation with page pool.
> > > Currently, all gstage mappings happen at runtime during the fault. Th=
is is expensive
> > > as we need to convert that page to confidential memory as well. A pag=
e pool framework
> > > may be a better choice which can hold all the confidential pages whic=
h can be
> > > pre-allocated upfront. A generic page pool infrastructure may benefit=
 other CC solutions ?
> >
> > I'm sorry, what?  Do y'all really not pay any attention to what is happ=
ening
> > outside of the RISC-V world?
> >
> > We, where "we" is KVM x86 and ARM, with folks contributing from 5+ comp=
anines,
> > have been working on this problem for going on three *years*.  And that=
's just
> > from the first public posting[1], there have been discussions about how=
 to approach
> > this for even longer.  There have been multiple related presentations a=
t KVM Forum,
> > something like 4 or 5 just at KVM Forum 2022 alone.
> >
>=20
> I did mention about that in the 1st item in the TODO list.

My apologies, I completely missed the todo list.

> Thanks for your suggestion. It seems we should just directly move to
> restrictedmem asap.

Yes please, for the sake of everyone involved.  It will likely save you fro=
m
running into the same pitfalls that x86 and ARM already encountered, and th=
e more
eyeballs and use cases on whatever restrictemem ends up being called, the b=
etter.

Thanks!