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Message-ID: <44e54d54-9a6d-ba49-c0db-f9de81743f64@linaro.org>
Date:   Fri, 21 Apr 2023 18:30:43 +0200
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Subject: Re: [PATCH v5 06/11] dt-bindings: PCI: Update the RK3399 example to a
 valid one
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To:     Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc:     Rick Wertenbroek <rick.wertenbroek@gmail.com>,
        alberto.dassatti@heig-vd.ch, xxm@rock-chips.com,
        dlemoal@kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
        =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= <kw@linux.com>,
        Rob Herring <robh@kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Heiko Stuebner <heiko@sntech.de>,
        Caleb Connolly <kc@postmarketos.org>,
        Corentin Labbe <clabbe@baylibre.com>,
        Brian Norris <briannorris@chromium.org>,
        Johan Jonker <jbx6244@gmail.com>,
        Judy Hsiao <judyhsiao@chromium.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Hugh Cole-Baker <sigmaris@gmail.com>,
        Arnaud Ferraris <arnaud.ferraris@collabora.com>,
        linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
References: <20230418074700.1083505-1-rick.wertenbroek@gmail.com>
 <20230418074700.1083505-7-rick.wertenbroek@gmail.com>
 <172c46b7-256e-b09d-3940-880fa8989b49@linaro.org>
 <ZEJW0giyXAlNMYTz@lpieralisi>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <ZEJW0giyXAlNMYTz@lpieralisi>
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On 21/04/2023 11:26, Lorenzo Pieralisi wrote:
> On Wed, Apr 19, 2023 at 10:01:25PM +0200, Krzysztof Kozlowski wrote:
>> On 18/04/2023 09:46, Rick Wertenbroek wrote:
>>> Update the example in the documentation to a valid example.
>>> Address for mem-base was invalid, it pointed to address
>>> 0x8000'0000 which is the upper region of the DDR which
>>> is not necessarily populated depending on the board.
>>> This address should point to the base of the memory
>>> window region of the controller which is 0xfa00'0000.
>>> Add missing pinctrl.
>>>
>>> Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
>>> ---
>>>  .../devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml      | 4 +++-
>>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml
>>> index 88386a6d7011..6b62f6f58efe 100644
>>> --- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml
>>> @@ -47,7 +47,7 @@ examples:
>>>  
>>>          pcie-ep@f8000000 {
>>>              compatible = "rockchip,rk3399-pcie-ep";
>>> -            reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0x80000000 0x0 0x20000>;
>>> +            reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0xfa000000 0x0 0x2000000>;
>>>              reg-names = "apb-base", "mem-base";
>>>              clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
>>>                <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
>>> @@ -63,6 +63,8 @@ examples:
>>>              phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>;
>>>              phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3";
>>>              rockchip,max-outbound-regions = <16>;
>>> +            pinctrl-names = "default";
>>> +            pinctrl-0 = <&pcie_clkreqnb_cpm>;
>>
>> This is just example of the binding, you do not need to fill all
>> unrelated (generic) properties like pinctrl.
> 
> Should I merge it as-is ?

Yeah, go ahead. That was the note for the future that generic properties
are not always needed or even helpful in the example.

Best regards,
Krzysztof