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From:   Peng Fan <peng.fan@nxp.com>
To:     Adam Ford <aford173@gmail.com>,
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CC:     "aford@beaconembedded.com" <aford@beaconembedded.com>,
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Subject: RE: [PATCH] Revert "clk: imx: composite-8m: Add support to
 determine_rate"
Thread-Topic: [PATCH] Revert "clk: imx: composite-8m: Add support to
 determine_rate"
Thread-Index: AQHZdeCGmyhtR4qStEaNJuTFpNoNjK85sGqw
Date:   Mon, 24 Apr 2023 01:43:43 +0000
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References: <20230423123828.1346511-1-aford173@gmail.com>
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> Subject: [PATCH] Revert "clk: imx: composite-8m: Add support to
> determine_rate"
>=20
> This reverts commit 156e96ff2172518b6f83e97d8f11f677bc668e22.
>=20
> This patch was found to cause some division issues on the i.MX8MP which
> causes the video clocks to not properly divide when division was greate t=
han
> 8.  This causes video failures on disp1_pix and disp2_pix clocks.
>=20
> Until a better solution is found, we'll have to revert this.
>=20
> Signed-off-by: Adam Ford <aford173@gmail.com>

Indeed we already see issue in NXP local CI with the previous patch.

Acked-by: Peng Fan <peng.fan@nxp.com>

>=20
> diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-
> composite-8m.c
> index 6883a8199b6c..cbf0d7955a00 100644
> --- a/drivers/clk/imx/clk-composite-8m.c
> +++ b/drivers/clk/imx/clk-composite-8m.c
> @@ -119,17 +119,10 @@ static int
> imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
>  	return ret;
>  }
>=20
> -static int imx8m_clk_divider_determine_rate(struct clk_hw *hw,
> -				      struct clk_rate_request *req)
> -{
> -	return clk_divider_ops.determine_rate(hw, req);
> -}
> -
>  static const struct clk_ops imx8m_clk_composite_divider_ops =3D {
>  	.recalc_rate =3D imx8m_clk_composite_divider_recalc_rate,
>  	.round_rate =3D imx8m_clk_composite_divider_round_rate,
>  	.set_rate =3D imx8m_clk_composite_divider_set_rate,
> -	.determine_rate =3D imx8m_clk_divider_determine_rate,
>  };
>=20
>  static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)
> --
> 2.39.2