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From:   Adam Ford <aford173@gmail.com>
Date:   Sun, 23 Apr 2023 21:59:11 -0500
Message-ID: <CAHCN7xLNeN52vhNt0ampSsMfdGx7L+oc3YhUtrvYv-1imQj9eQ@mail.gmail.com>
Subject: Re: [PATCH 1/2] arm64: dts: imx8mn: Enable CSI and ISI Nodes
To:     Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc:     linux-arm-kernel@lists.infradead.org,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
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On Sun, Apr 23, 2023 at 9:22=E2=80=AFPM Adam Ford <aford173@gmail.com> wrot=
e:
>
> On Sun, Apr 23, 2023 at 7:46=E2=80=AFPM Laurent Pinchart
> <laurent.pinchart@ideasonboard.com> wrote:
> >
> > Hi Adam,
> >
> > Thank you for the patch.
> >
> > On Sun, Apr 23, 2023 at 04:26:55PM -0500, Adam Ford wrote:
> > > The CSI in the imx8mn is the same as what is used in the imx8mm,
> > > but it's routed to the ISI on the Nano. Add both the ISI and CSI
> > > nodes, and pointing them to each other. Since the CSI capture is
> > > dependent on an attached camera, mark both ISI and CSI as
> > > disabled by default.
> >
> > I'd then write the subject line as "Add CSI and ISI nodes".
>
> That makes sense, especially since I disabled them by default.
> >
> > > Signed-off-by: Adam Ford <aford173@gmail.com>
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/b=
oot/dts/freescale/imx8mn.dtsi
> > > index 8be8f090e8b8..102550b41f22 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > > @@ -1104,6 +1104,24 @@ dsim_from_lcdif: endpoint {
> > >                               };
> > >                       };
> > >
> > > +                     isi: isi@32e20000 {
> > > +                             compatible =3D "fsl,imx8mn-isi";
> > > +                             reg =3D <0x32e20000 0x100>;
> >
> > The i.MX8MN reference manual documents the ISI registers block size to
> > be 64kB. Should we use the same here, even if all the registers we need
> > are within the first 256 bytes ?
>
> I can do that.

There is a typo in the Nano Ref Manual.  Even though the table in
"Table 2-6. AIPS4 Memory Map" reads 64K, the DISPLAY_BLK_CTRL starts
at 32e2_8000.  The largest size we can do is 0x8000 (32k)

> >
> > > +                             interrupts =3D <GIC_SPI 16 IRQ_TYPE_LEV=
EL_HIGH>;
> > > +                             clocks =3D <&clk IMX8MN_CLK_DISP_AXI_RO=
OT>,
> > > +                                      <&clk IMX8MN_CLK_DISP_APB_ROOT=
>;
> > > +                             clock-names =3D "axi", "apb";
> > > +                             fsl,blk-ctrl =3D <&disp_blk_ctrl>;
> > > +                             power-domains =3D <&disp_blk_ctrl IMX8M=
N_DISPBLK_PD_ISI>;
> > > +                             status =3D "disabled";
> > > +
> > > +                             port {
> > > +                                     isi_in: endpoint {
> > > +                                             remote-endpoint =3D <&m=
ipi_csi_out>;
> > > +                                     };
> > > +                             };
> >
> > This will fail to validate against the ISI DT binding, as they require =
a
> > "ports" node. When a single port is present using a "port" node directl=
y
> > is fine from an OF graph point of view, but to avoid too much complexit=
y
> > in the ISI binding the consensus was to always require a "ports" node
> > for the ISI.
>
>
> Argh!  I pulled from the wrong test repo.  I remember the discussion
> from a few months back.  I'll fix it and the others when I submit V2.

It appears that using ports still throws warnings:

arch/arm64/boot/dts/freescale/imx8mn.dtsi:1118.11-1128.7: Warning
(graph_child_address): /soc@0/bus@32c00000/isi@32e20000/ports: graph
node has single child node 'port@0', #address-cells/#size-cells are
not necessary

I'll leave it like this because we were told to do so.

adam
>
> >
> > > +                     };
> > > +
> > >                       disp_blk_ctrl: blk-ctrl@32e28000 {
> > >                               compatible =3D "fsl,imx8mn-disp-blk-ctr=
l", "syscon";
> > >                               reg =3D <0x32e28000 0x100>;
> > > @@ -1147,6 +1165,42 @@ disp_blk_ctrl: blk-ctrl@32e28000 {
> > >                               #power-domain-cells =3D <1>;
> > >                       };
> > >
> > > +                     mipi_csi: mipi-csi@32e30000 {
> > > +                             compatible =3D "fsl,imx8mm-mipi-csi2";
> > > +                             reg =3D <0x32e30000 0x1000>;
> > > +                             interrupts =3D <GIC_SPI 17 IRQ_TYPE_LEV=
EL_HIGH>;
> > > +                             assigned-clocks =3D <&clk IMX8MN_CLK_CA=
MERA_PIXEL>,
> > > +                                               <&clk IMX8MN_CLK_CSI1=
_PHY_REF>;
> > > +                             assigned-clock-parents =3D <&clk IMX8MN=
_SYS_PLL2_1000M>,
> > > +                                                       <&clk IMX8MN_=
SYS_PLL2_1000M>;
> > > +                             assigned-clock-rates =3D <333000000>;
> > > +                             clock-frequency =3D <333000000>;
> > > +                             clocks =3D <&clk IMX8MN_CLK_DISP_APB_RO=
OT>,
> > > +                                      <&clk IMX8MN_CLK_CAMERA_PIXEL>=
,
> > > +                                      <&clk IMX8MN_CLK_CSI1_PHY_REF>=
,
> > > +                                      <&clk IMX8MN_CLK_DISP_AXI_ROOT=
>;
> > > +                             clock-names =3D "pclk", "wrap", "phy", =
"axi";
> > > +                             power-domains =3D <&disp_blk_ctrl IMX8M=
N_DISPBLK_PD_MIPI_CSI>;
> > > +                             status =3D "disabled";
> > > +
> > > +                             ports {
> > > +                                     #address-cells =3D <1>;
> > > +                                     #size-cells =3D <0>;
> > > +
> > > +                                     port@0 {
> > > +                                             reg =3D <0>;
> > > +                                     };
> > > +
> > > +                                     port@1 {
> > > +                                             reg =3D <1>;
> > > +
> > > +                                             mipi_csi_out: endpoint =
{
> > > +                                                     remote-endpoint=
 =3D <&isi_in>;
> > > +                                             };
> > > +                                     };
> > > +                             };
> > > +                     };
> > > +
> > >                       usbotg1: usb@32e40000 {
> > >                               compatible =3D "fsl,imx8mn-usb", "fsl,i=
mx7d-usb", "fsl,imx27-usb";
> > >                               reg =3D <0x32e40000 0x200>;
> >
> > --
> > Regards,
> >
> > Laurent Pinchart