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Mon, 24 Apr 2023 20:53:16 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33OKrFfJ014500 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 24 Apr 2023 20:53:15 GMT Received: from [10.110.104.134] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Mon, 24 Apr 2023 13:53:13 -0700 Message-ID: Date: Mon, 24 Apr 2023 13:53:13 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [Freedreno] [PATCH v2 04/17] drm/msm/dpu: Fix PP_BLK_DIPHER -> DITHER typo Content-Language: en-US To: Marijn Suijten , Rob Clark , Dmitry Baryshkov , "Sean Paul" , David Airlie , Daniel Vetter , Adam Skladowski , Loic Poulain , Bjorn Andersson , "Kuogee Hsieh" , Robert Foss , Vinod Koul , Rajesh Yadav , Jeykumar Sankaran , Neil Armstrong , "Chandan Uddaraju" CC: Archit Taneja , Jami Kettunen , , , , "Jordan Crouse" , Konrad Dybcio , Martin Botka , <~postmarketos/upstreaming@lists.sr.ht>, AngeloGioacchino Del Regno , , Sravanthi Kollukuduru References: <20230411-dpu-intf-te-v2-0-ef76c877eb97@somainline.org> <20230411-dpu-intf-te-v2-4-ef76c877eb97@somainline.org> From: Abhinav Kumar In-Reply-To: <20230411-dpu-intf-te-v2-4-ef76c877eb97@somainline.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eoF33-LoodpsB38LAtLN1k7mjpuSHdKN X-Proofpoint-ORIG-GUID: eoF33-LoodpsB38LAtLN1k7mjpuSHdKN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-24_11,2023-04-21_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 phishscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304240189 X-Spam-Status: No, score=-4.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/17/2023 1:21 PM, Marijn Suijten wrote: > SM8550 only comes with a DITHER subblock inside the PINGPONG block, > hence the name and a block length of zero. However, the PP_BLK macro > name was typo'd to DIPHER rather than DITHER. > > Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550") > Signed-off-by: Marijn Suijten This change itself is fine, hence Reviewed-by: Abhinav Kumar one comment below > --- > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 16 ++++++++-------- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +- > 2 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > index 9e403034093f..d0ab351b6a8b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > @@ -132,28 +132,28 @@ static const struct dpu_dspp_cfg sm8550_dspp[] = { > &sm8150_dspp_sblk), > }; > static const struct dpu_pingpong_cfg sm8550_pp[] = { dither block should be present on many other chipsets too but looks like on sm8550 was enabling it. Not sure how it was validated there. But we are enabling dither, even other chipsets have this block. > - PP_BLK_DIPHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), > -1), > - PP_BLK_DIPHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), > -1), > - PP_BLK_DIPHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), > -1), > - PP_BLK_DIPHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), > -1), > - PP_BLK_DIPHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30), > -1), > - PP_BLK_DIPHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31), > -1), > - PP_BLK_DIPHER("pingpong_6", PINGPONG_6, 0x66000, MERGE_3D_3, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_6", PINGPONG_6, 0x66000, MERGE_3D_3, sc7280_pp_sblk, > -1, > -1), > - PP_BLK_DIPHER("pingpong_7", PINGPONG_7, 0x66400, MERGE_3D_3, sc7280_pp_sblk, > + PP_BLK_DITHER("pingpong_7", PINGPONG_7, 0x66400, MERGE_3D_3, sc7280_pp_sblk, > -1, > -1), > }; > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index 03f162af1a50..ca8a02debda9 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -491,7 +491,7 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = { > .len = 0x20, .version = 0x20000}, > }; > > -#define PP_BLK_DIPHER(_name, _id, _base, _merge_3d, _sblk, _done, _rdptr) \ > +#define PP_BLK_DITHER(_name, _id, _base, _merge_3d, _sblk, _done, _rdptr) \ > {\ > .name = _name, .id = _id, \ > .base = _base, .len = 0, \ >