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Subject: Re: [PATCH v9 4/8] clk: qcom: gcc-ipq9574: Add USB related clocks
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Varadarajan Narayanan <quic_varada@quicinc.com>
To:     Varadarajan Narayanan <quic_varada@quicinc.com>, agross@kernel.org,
        andersson@kernel.org, devicetree@vger.kernel.org,
        gregkh@linuxfoundation.org, kishon@kernel.org,
        konrad.dybcio@linaro.org, krzysztof.kozlowski+dt@linaro.org,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
        linux-usb@vger.kernel.org, mturquette@baylibre.com,
        quic_wcheng@quicinc.com, robh+dt@kernel.org, vkoul@kernel.org
Date:   Mon, 24 Apr 2023 18:22:35 -0700
User-Agent: alot/0.10
Precedence: bulk

Quoting Varadarajan Narayanan (2023-04-21 08:54:46)
> diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq957=
4.c
> index a4cf750..8d7f543 100644
> --- a/drivers/clk/qcom/gcc-ipq9574.c
> +++ b/drivers/clk/qcom/gcc-ipq9574.c
> @@ -2025,6 +2025,41 @@ static struct clk_regmap_mux usb0_pipe_clk_src =3D=
 {
>         },
>  };
> =20
> +static struct clk_branch gcc_usb0_pipe_clk =3D {
> +       .halt_reg =3D 0x2c054,
> +       .halt_check =3D BRANCH_HALT_DELAY,
> +       .clkr =3D {
> +               .enable_reg =3D 0x2c054,
> +               .enable_mask =3D BIT(0),
> +               .hw.init =3D &(struct clk_init_data){

const

> +                       .name =3D "gcc_usb0_pipe_clk",
> +                       .parent_hws =3D (const struct clk_hw *[]) {
> +                               &usb0_pipe_clk_src.clkr.hw
> +                       },
> +                       .num_parents =3D 1,
> +                       .flags =3D CLK_SET_RATE_PARENT,
> +                       .ops =3D &clk_branch2_ops,
> +               },
> +       },
> +};
> +
> +static struct clk_branch gcc_usb0_sleep_clk =3D {
> +       .halt_reg =3D 0x2c058,
> +       .clkr =3D {
> +               .enable_reg =3D 0x2c058,
> +               .enable_mask =3D BIT(0),
> +               .hw.init =3D &(struct clk_init_data){

const

> +                       .name =3D "gcc_usb0_sleep_clk",
> +                       .parent_hws =3D (const struct clk_hw *[]) {
> +                               &gcc_sleep_clk_src.clkr.hw
> +                       },
> +                       .num_parents =3D 1,
> +                       .flags =3D CLK_SET_RATE_PARENT,
> +                       .ops =3D &clk_branch2_ops,
> +               },
> +       },
> +};
> +
>  static const struct freq_tbl ftbl_sdcc_apps_clk_src[] =3D {
>         F(144000, P_XO, 16, 12, 125),
>         F(400000, P_XO, 12, 1, 5),