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Tue, 25 Apr 2023 01:24:30 -0700 (PDT) MIME-Version: 1.0 References: <20230424112523.1436926-1-angelogioacchino.delregno@collabora.com> <20230424112523.1436926-4-angelogioacchino.delregno@collabora.com> In-Reply-To: <20230424112523.1436926-4-angelogioacchino.delregno@collabora.com> From: Chen-Yu Tsai Date: Tue, 25 Apr 2023 16:24:19 +0800 Message-ID: Subject: Re: [PATCH v2 3/4] arm64: dts: mediatek: cherry: Configure eDP and internal display To: AngeloGioacchino Del Regno Cc: matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 24, 2023 at 7:25=E2=80=AFPM AngeloGioacchino Del Regno wrote: > > Add the required nodes to enable the DisplayPort interface, connected > to the Embedded DisplayPort port, where we have an internal display. > > Signed-off-by: AngeloGioacchino Del Regno > --- > .../boot/dts/mediatek/mt8195-cherry.dtsi | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64= /boot/dts/mediatek/mt8195-cherry.dtsi > index 4229f4f7dc2f..adbda4dccdd5 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi > @@ -47,6 +47,18 @@ memory@40000000 { > reg =3D <0 0x40000000 0 0x80000000>; > }; > > + pp3300_disp_x: regulator-pp3300-disp-x { > + compatible =3D "regulator-fixed"; > + regulator-name =3D "pp3300_disp_x"; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + enable-active-high; > + gpio =3D <&pio 55 GPIO_ACTIVE_HIGH>; > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&panel_fixed_pins>; > + regulator-always-on; I think you missed my comment on v1 about this regulator's supplier and enable delay. ChenYu > + }; > + > /* system wide LDO 3.3V power rail */ > pp3300_z5: regulator-pp3300-ldo-z5 { > compatible =3D "regulator-fixed"; > @@ -288,6 +300,20 @@ port@1 { > reg =3D <1>; > edp_out: endpoint { > data-lanes =3D <0 1 2 3>; > + remote-endpoint =3D <&panel_in>; > + }; > + }; > + }; > + > + aux-bus { > + panel { > + compatible =3D "edp-panel"; > + power-supply =3D <&pp3300_disp_x>; > + backlight =3D <&backlight_lcd0>; > + port { > + panel_in: endpoint { > + remote-endpoint =3D <&edp_out>; > + }; > }; > }; > }; > @@ -927,6 +953,12 @@ pins-cs { > }; > }; > > + panel_fixed_pins: panel-pwr-default-pins { > + pins-vreg-en { > + pinmux =3D ; > + }; > + }; > + > pio_default: pio-default-pins { > pins-wifi-enable { > pinmux =3D ; > -- > 2.40.0 > >