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Message-ID: <tencent_1647475C9618C390BEC601BE2CC1206D0C07@qq.com>
From:   Yangyu Chen <cyy@cyyself.name>
To:     Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>
Cc:     linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        Wende Tan <twd2.me@gmail.com>, Soha Jin <soha@lohu.info>,
        Hongren Zheng <i@zenithal.me>, Yangyu Chen <cyy@cyyself.name>
Subject: [PATCH 0/2] Allow case-insensitive RISC-V ISA string
Date:   Tue, 25 Apr 2023 20:00:14 +0800
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

According to RISC-V ISA specification, the ISA naming strings are
case insensitive. The kernel docs require the riscv,isa string must
be all lowercase to simplify parsing currently. However, this 
limitation is not consistent with RISC-V ISA Spec.

The motivation for this patch series is that some SoC generators
will provide ISA strings with uppercase letters in the device tree.
For example, the rocket-chip will have "Zicsr_Zifencei_Zihpm_Xrocket"
in the ISA string. If we did not modify the ISA string manually, the
parser in the current kernel will have errors when the pointer meets
uppercase letters because it assumes the string only has digits, 
lowercase letters, and underscores. Then, the parser will fail and
the pointer of the parser will continue at the next position, which
will confuse the parser and cause the kernel to misbehave.

For example, "Zifencei" will be parsed as "ifc" since the parser will
fail at 'Z' and then continue at 'i'. Then, if we disable the FPU in
the CPU hardware and remove the "fd" from the device tree but leave
the CONFIG_FPU=y in the kernel, the kernel will panic at 
`__fstate_restore` function since the "Zifencei" (parsed as "ifc")
will confuse the current kernel that the CPU has "f", and the kernel
will save and restore the FPU registers during the context switch,
leading to illegal instruction exceptions.

However, it is not necessary to require the ISA string must be all
lowercase. The case-insensitive parser can be easily implemented
using `strncasecmp` and `tolower` functions. Moreover, the kernel
parser implementation should match the ISA specification rather than
using a more strict rule.

This patch series allows case-insensitive RISC-V ISA string:
* Patch 1 modifies the ISA string parser in the kernel to support
  case-insensitive ISA string parsing. It replaces `strncmp` with
  `strncasecmp`, replaces `islower` with `isalpha`, and wraps the
  dereferenced char in the parser with `tolower`.
* Patch 2 modifies the docs to no longer require the riscv,isa
  string to be all lowercase.

Yangyu Chen (2):
  riscv: allow case-insensitive ISA string parsing
  docs: dt: allow case-insensitive RISC-V ISA string

 .../devicetree/bindings/riscv/cpus.yaml       |  7 +++----
 arch/riscv/kernel/cpu.c                       |  6 ++++--
 arch/riscv/kernel/cpufeature.c                | 20 +++++++++----------
 3 files changed, 17 insertions(+), 16 deletions(-)

-- 
2.40.0