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Message-ID: <9f28dbff-ca3a-8523-5bfc-37b38bc846c3@linaro.org>
Date:   Tue, 25 Apr 2023 14:45:57 +0100
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Subject: Re: [PATCH] spi: spi-geni-qcom: Correct CS_TOGGLE bit in
 SPI_TRANS_CFG
Content-Language: en-US
To:     Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>,
        agross@kernel.org, andersson@kernel.org, broonie@kernel.org,
        linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
        linux-kernel@vger.kernel.org
Cc:     quic_msavaliy@quicinc.com, dianders@chromium.org, mka@chromium.org,
        swboyd@chromium.org, quic_vtanuku@quicinc.com
References: <1682412128-1913-1-git-send-email-quic_vnivarth@quicinc.com>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <1682412128-1913-1-git-send-email-quic_vnivarth@quicinc.com>
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On 4/25/23 09:42, Vijaya Krishna Nivarthi wrote:
> The CS_TOGGLE bit when set is supposed to instruct FW to
> toggle CS line between words. The driver with intent of
> disabling this behaviour has been unsetting BIT(0). This has
> not caused any trouble so far because the original BIT(1)
> is untouched and BIT(0) likely wasn't being used.
>
> Correct this to prevent a potential future bug.
>
> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
> ---

Has this always been the case, or did the switch to BIT(1)
only occur on some recent platforms?

Konrad

>   drivers/spi/spi-geni-qcom.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index ba7be50..8a7d1c2 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -35,7 +35,7 @@
>   #define CS_DEMUX_OUTPUT_SEL	GENMASK(3, 0)
>   
>   #define SE_SPI_TRANS_CFG	0x25c
> -#define CS_TOGGLE		BIT(0)
> +#define CS_TOGGLE		BIT(1)
>   
>   #define SE_SPI_WORD_LEN		0x268
>   #define WORD_LEN_MSK		GENMASK(9, 0)