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References: <20230425095700.22005-1-quic_neeraju@quicinc.com>
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From:   Ard Biesheuvel <ardb@kernel.org>
Date:   Tue, 25 Apr 2023 19:11:46 +0100
Message-ID: <CAMj1kXHzHhuiFDSULNQShKhiV3BVxkRhUrK1x7vM0vNnMPKO=w@mail.gmail.com>
Subject: Re: [PATCH] arm64: Fix label placement in record_mmu_state()
To:     Neeraj Upadhyay <quic_neeraju@quicinc.com>
Cc:     catalin.marinas@arm.com, mark.rutland@arm.com,
        kristina.martsenko@arm.com, maz@kernel.org, broonie@kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
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On Tue, 25 Apr 2023 at 10:57, Neeraj Upadhyay <quic_neeraju@quicinc.com> wrote:
>
> Fix label so that pre_disable_mmu_workaround() is called
> before clearing sctlr_el1.M.
>
> Fixes: 2ced0f30a426 ("arm64: head: Switch endianness before populating the ID map")
> Signed-off-by: Neeraj Upadhyay <quic_neeraju@quicinc.com>

Acked-by: Ard Biesheuvel <ardb@kernel.org>

> ---
>  arch/arm64/kernel/head.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index b98970907226..e92caebff46a 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -150,8 +150,8 @@ CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f    )
>         pre_disable_mmu_workaround
>         msr     sctlr_el2, x19
>         b       3f
> -       pre_disable_mmu_workaround
> -2:     msr     sctlr_el1, x19
> +2:     pre_disable_mmu_workaround
> +       msr     sctlr_el1, x19
>  3:     isb
>         mov     x19, xzr
>         ret
> --
> 2.17.1
>