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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Sean Christopherson <seanjc@google.com>
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Subject: Re: [patch 00/37] cpu/hotplug, x86: Reworked parallel CPU bringup
In-Reply-To: <87v8hq35sk.ffs@tglx>
References: <87r0sh4m7a.ffs@tglx>
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 <0f5463fd-9c4a-6361-adbb-dd89dbb9138d@citrix.com>
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Date:   Tue, 25 Apr 2023 22:07:47 +0200
Message-ID: <87r0s7zpws.ffs@tglx>
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On Thu, Apr 20 2023 at 17:57, Thomas Gleixner wrote:
> On Thu, Apr 20 2023 at 07:51, Sean Christopherson wrote:
> Something like the completely untested below should just work whatever
> APIC ID the BIOS decided to dice.
>
> That might just work on SEV too without that GHCB muck, but what do I
> know.

It does not.

RDMSR(X2APIC_ID) is trapped via #VC which cannot be handled at that
point. Unfortunately the GHCB protocol does not provide a RDMSR
mechanism similar to the CPUID mechanism. Neither does the secure
firmware enforce CPUID(0xb):APICID to real APIC ID consistency.

So the hypervisor can dice the APIC IDs as long as they are consistent
with the provided ACPI/MADT table.

So no parallel startup for SEV for now.

Thanks,

        tglx