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From:   "Katakam, Harini" <harini.katakam@amd.com>
To:     Vladimir Oltean <vladimir.oltean@nxp.com>
CC:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "andrew@lunn.ch" <andrew@lunn.ch>,
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        "Simek, Michal" <michal.simek@amd.com>,
        "Pandey, Radhey Shyam" <radhey.shyam.pandey@amd.com>
Subject: RE: [PATCH net-next v2 3/3] phy: mscc: Add support for VSC8531_02
 with RGMII tuning
Thread-Topic: [PATCH net-next v2 3/3] phy: mscc: Add support for VSC8531_02
 with RGMII tuning
Thread-Index: AQHZeCv6AGCFWckldUa9v4r2nKGr6K89cUQagAAJECA=
Date:   Wed, 26 Apr 2023 12:21:47 +0000
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Hi Vladimir,

> -----Original Message-----
> From: Vladimir Oltean <vladimir.oltean@nxp.com>
> Sent: Wednesday, April 26, 2023 4:48 PM
> To: Katakam, Harini <harini.katakam@amd.com>
> Cc: robh+dt@kernel.org; andrew@lunn.ch; hkallweit1@gmail.com;
> linux@armlinux.org.uk; davem@davemloft.net; kuba@kernel.org;
> edumazet@google.com; pabeni@redhat.com; wsa+renesas@sang-
> engineering.com; krzysztof.kozlowski+dt@linaro.org;
> simon.horman@corigine.com; netdev@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> harinikatakamlinux@gmail.com; Simek, Michal <michal.simek@amd.com>;
> Pandey, Radhey Shyam <radhey.shyam.pandey@amd.com>
> Subject: Re: [PATCH net-next v2 3/3] phy: mscc: Add support for VSC8531_0=
2
> with RGMII tuning
>=20
> On Wed, Apr 26, 2023 at 04:13:13PM +0530, Harini Katakam wrote:
> > From: Harini Katakam <harini.katakam@xilinx.com>
> >
> > Add support for VSC8531_02 (Rev 2) device.
> > Add support for optional RGMII RX and TX delay tuning via devicetree.
> > The hierarchy is:
> > - Retain the defaul 0.2ns delay when RGMII tuning is not set.
> > - Retain the default 2ns delay when RGMII tuning is set and DT delay
> > property is NOT specified.
> > - Use the DT delay value when RGMII tuning is set and a DT delay
> > property is specified.
> >
> > Signed-off-by: Harini Katakam <harini.katakam@amd.com>
> > Signed-off-by: Radhey Shyam Pandey
> <radhey.shyam.pandey@xilinx.com>
> > Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> > ---
<snip>
> > @@ -532,10 +533,10 @@ static int vsc85xx_rgmii_set_skews(struct
> phy_device *phydev, u32 rgmii_cntl,
> >
> >  	if (phydev->interface =3D=3D PHY_INTERFACE_MODE_RGMII_RXID ||
> >  	    phydev->interface =3D=3D PHY_INTERFACE_MODE_RGMII_ID)
> > -		reg_val |=3D RGMII_CLK_DELAY_2_0_NS <<
> rgmii_rx_delay_pos;
> > +		reg_val |=3D vsc8531->rx_delay << rgmii_rx_delay_pos;
> >  	if (phydev->interface =3D=3D PHY_INTERFACE_MODE_RGMII_TXID ||
> >  	    phydev->interface =3D=3D PHY_INTERFACE_MODE_RGMII_ID)
> > -		reg_val |=3D RGMII_CLK_DELAY_2_0_NS <<
> rgmii_tx_delay_pos;
> > +		reg_val |=3D vsc8531->tx_delay << rgmii_tx_delay_pos;
> >
> >  	rc =3D phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2,
> >  			      rgmii_cntl,
> > @@ -1812,6 +1813,15 @@ static int vsc85xx_config_init(struct phy_device
> *phydev)
> >  {
> >  	int rc, i, phy_id;
> >  	struct vsc8531_private *vsc8531 =3D phydev->priv;
> > +	struct device_node *of_node =3D phydev->mdio.dev.of_node;
> > +
> > +	vsc8531->rx_delay =3D RGMII_CLK_DELAY_2_0_NS;
> > +	rc =3D of_property_read_u32(of_node, "mscc,rx-delay",
> > +				  &vsc8531->rx_delay);
> > +
> > +	vsc8531->tx_delay =3D RGMII_CLK_DELAY_2_0_NS;
> > +	rc =3D of_property_read_u32(of_node, "mscc,tx-delay",
> > +				  &vsc8531->tx_delay);
>=20
> Since the dt-bindings document says "If this property is present then
> the PHY applies the RX|TX delay", then I guess the precedence as applied
> by vsc85xx_rgmii_set_skews() should be different. The RX delays should
> be applied based on rx-internal-delay-ps (if present) regardless of
> phy-mode, or set to RGMII_CLK_DELAY_2_0_NS if we are in the rgmii-rxid ph=
y_get_internal_delay
> or rgmii-id modes. Similar for tx.

Thanks for the review.
The intention is to have the following precedence (I'll rephrase the commit=
 if required)
-> If phy-mode is rgmii, current behavior persists for all devices
-> If phy-mode is rgmii-id/rgmii-rxid/rgmii-txid, current behavior persists=
 for all devices
(i.e. delay of RGMII_CLK_DELAY_2_0_NS)
-> If phy-mode is rgmii-id/rgmii-rxid/rgmii-txid AND rx-internal-delay-ps/t=
x-internal-delay-ps
is defined, then the value from DT is considered instead of 2ns. (NOT irres=
pective of phy-mode)

I'm checking the phy drivers that use phy_get_internal_delay and the descri=
ption phy-mode
in ethernet-controller.yaml and rx/tx-internal-delay-ps in ethernet-phy.yam=
l. It does look like
the above is allowed. Please do let me know otherwise.

I will re-spin the series using phy_get_internal_delay.

Regards,
Harini