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Wed, 26 Apr 2023 07:48:48 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33QCmmpU019878; Wed, 26 Apr 2023 07:48:48 -0500 Date: Wed, 26 Apr 2023 07:48:48 -0500 From: Nishanth Menon To: Udit Kumar CC: , , , , , , , , Subject: Re: [PATCH 5/5] arm64: dts: ti: k3-j7200: Add bootph-pre-ram for u-boot Message-ID: <20230426124848.2af7ombywlsqkbva@autistic> References: <20230426103219.1565266-1-u-kumar1@ti.com> <20230426103219.1565266-6-u-kumar1@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230426103219.1565266-6-u-kumar1@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16:02-20230426, Udit Kumar wrote: > Adding bootph-pre-ram property for pin mux needed by > uboot. > > Signed-off-by: Udit Kumar > --- > arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 5 +++++ > arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 3 +++ > 2 files changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts > index 2cdfd957dd12..1bcb94aec588 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts > @@ -81,7 +81,9 @@ vdd_sd_dv: gpio-regulator-TLV71033 { > }; > > &wkup_pmx0 { > + bootph-pre-ram; > mcu_uart0_pins_default: mcu_uart0_pins_default { > + bootph-pre-ram; > pinctrl-single,pins = < > J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */ > J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */ > @@ -91,6 +93,7 @@ J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */ > }; > > wkup_uart0_pins_default: wkup_uart0_pins_default { > + bootph-pre-ram; > pinctrl-single,pins = < > J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ > J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ > @@ -125,7 +128,9 @@ J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ > }; > > &main_pmx0 { > + bootph-pre-ram; > main_uart0_pins_default: main_uart0_pins_default { > + bootph-pre-ram; > pinctrl-single,pins = < > J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */ > J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */ > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi > index 269424154771..d2500837a0e8 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi > @@ -119,7 +119,9 @@ J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ > }; > > &wkup_pmx2 { > + bootph-pre-ram; > wkup_i2c0_pins_default: wkup-i2c0-pins-default { > + bootph-pre-ram; > pinctrl-single,pins = < > J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */ > J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ > @@ -129,6 +131,7 @@ J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ > > &main_pmx0 { > main_i2c0_pins_default: main-i2c0-pins-default { > + bootph-pre-ram; > pinctrl-single,pins = < > J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ > J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ > -- > 2.34.1 > There are a bunch of other nodes that neeed bootph-pre-ram -> lets first ensure all the nodes needed for u-boot is present (esm is still in discussion) then add bootph-pre-ram and related ones in a follow on series. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D