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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PA4PR03MB7136.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: af4bd719-dea1-4f8e-4d3e-08db4659dd9e X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Apr 2023 13:26:37.9215 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: IbuvGKWrOrjzbGei53MCY5/7Q3i4b9cfQsaQn31fmxUKdI0hdr9SZZ6gVuq3kab5nn0QaDnK5l7mDOsPikVUegqyf1x6l5ITDeHOlEV+HKU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR03MB9380 X-Proofpoint-ORIG-GUID: kli-DuRYMp6Crc3Wubeyly5bJKxDf2th X-Proofpoint-GUID: kli-DuRYMp6Crc3Wubeyly5bJKxDf2th X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-26_06,2023-04-26_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 adultscore=0 malwarescore=0 mlxscore=0 spamscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304260119 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org scmi-pinctrl driver implements pinctrl driver interface and using SCMI protocol to redirect messages from pinctrl subsystem SDK to SCP firmware, which does the changes in HW. This setup expects SCP firmware (or similar system, such as ATF) to be installed on the platform, which implements pinctrl driver for the specific platform. SCMI-Pinctrl driver should be configured from the device-tree and uses generic device-tree mappings for the configuration. Signed-off-by: Oleksii Moisieiev --- MAINTAINERS | 1 + drivers/pinctrl/Kconfig | 9 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-scmi.c | 578 +++++++++++++++++++++++++++++++++ 4 files changed, 589 insertions(+) create mode 100644 drivers/pinctrl/pinctrl-scmi.c diff --git a/MAINTAINERS b/MAINTAINERS index 0d251ebac437..ba9e3aea6176 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20322,6 +20322,7 @@ M: Oleksii Moisieiev L: linux-arm-kernel@lists.infradead.org S: Maintained F: drivers/firmware/arm_scmi/pinctrl.c +F: drivers/pinctrl/pinctrl-scmi.c =20 SYSTEM RESET/SHUTDOWN DRIVERS M: Sebastian Reichel diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index dcb53c4a9584..16bf2c67f095 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -552,4 +552,13 @@ source "drivers/pinctrl/uniphier/Kconfig" source "drivers/pinctrl/visconti/Kconfig" source "drivers/pinctrl/vt8500/Kconfig" =20 +config PINCTRL_SCMI + bool "Pinctrl driver controlled via SCMI interface" + depends on ARM_SCMI_PROTOCOL || COMPILE_TEST + help + This driver provides support for pinctrl which is controlled + by firmware that implements the SCMI interface. + It uses SCMI Message Protocol to interact with the + firmware providing all the pinctrl controls. + endif diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index d5939840bb2a..21366db4f4f4 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_PINCTRL_TB10X) +=3D pinctrl-tb10x.o obj-$(CONFIG_PINCTRL_THUNDERBAY) +=3D pinctrl-thunderbay.o obj-$(CONFIG_PINCTRL_ZYNQMP) +=3D pinctrl-zynqmp.o obj-$(CONFIG_PINCTRL_ZYNQ) +=3D pinctrl-zynq.o +obj-$(CONFIG_PINCTRL_SCMI) +=3D pinctrl-scmi.o =20 obj-y +=3D actions/ obj-$(CONFIG_ARCH_ASPEED) +=3D aspeed/ diff --git a/drivers/pinctrl/pinctrl-scmi.c b/drivers/pinctrl/pinctrl-scmi.= c new file mode 100644 index 000000000000..8401db1d030b --- /dev/null +++ b/drivers/pinctrl/pinctrl-scmi.c @@ -0,0 +1,578 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System Control and Power Interface (SCMI) Protocol based pinctrl driver + * + * Copyright (C) 2023 EPAM + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "pinctrl-utils.h" +#include "core.h" +#include "pinconf.h" + +#define DRV_NAME "scmi-pinctrl" + +static const struct scmi_pinctrl_proto_ops *pinctrl_ops; + +struct scmi_pinctrl_funcs { + unsigned int num_groups; + const char **groups; +}; + +struct scmi_pinctrl { + struct device *dev; + struct scmi_protocol_handle *ph; + struct pinctrl_dev *pctldev; + struct pinctrl_desc pctl_desc; + struct scmi_pinctrl_funcs *functions; + unsigned int nr_functions; + char **groups; + unsigned int nr_groups; + struct pinctrl_pin_desc *pins; + unsigned int nr_pins; +}; + +static int pinctrl_scmi_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return -EINVAL; + + return pinctrl_ops->get_count(pmx->ph, GROUP_TYPE); +} + +static const char *pinctrl_scmi_get_group_name(struct pinctrl_dev *pctldev= , + unsigned int selector) +{ + int ret; + const char *name; + struct scmi_pinctrl *pmx; + + if (!pctldev) + return NULL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return NULL; + + ret =3D pinctrl_ops->get_name(pmx->ph, selector, GROUP_TYPE, &name); + if (ret) { + dev_err(pmx->dev, "get name failed with err %d", ret); + return NULL; + } + + return name; +} + +static int pinctrl_scmi_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int selector, + const unsigned int **pins, + unsigned int *num_pins) +{ + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return -EINVAL; + + return pinctrl_ops->get_group_pins(pmx->ph, selector, + pins, num_pins); +} + +static void pinctrl_scmi_pin_dbg_show(struct pinctrl_dev *pctldev, + struct seq_file *s, + unsigned int offset) +{ + seq_puts(s, DRV_NAME); +} + +#ifdef CONFIG_OF +static int pinctrl_scmi_dt_node_to_map(struct pinctrl_dev *pctldev, + struct device_node *np_config, + struct pinctrl_map **map, + u32 *num_maps) +{ + return pinconf_generic_dt_node_to_map(pctldev, np_config, map, + num_maps, PIN_MAP_TYPE_INVALID); +} + +static void pinctrl_scmi_dt_free_map(struct pinctrl_dev *pctldev, + struct pinctrl_map *map, u32 num_maps) +{ + kfree(map); +} + +#endif /* CONFIG_OF */ + +static const struct pinctrl_ops pinctrl_scmi_pinctrl_ops =3D { + .get_groups_count =3D pinctrl_scmi_get_groups_count, + .get_group_name =3D pinctrl_scmi_get_group_name, + .get_group_pins =3D pinctrl_scmi_get_group_pins, + .pin_dbg_show =3D pinctrl_scmi_pin_dbg_show, +#ifdef CONFIG_OF + .dt_node_to_map =3D pinctrl_scmi_dt_node_to_map, + .dt_free_map =3D pinctrl_scmi_dt_free_map, +#endif +}; + +static int pinctrl_scmi_get_functions_count(struct pinctrl_dev *pctldev) +{ + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return -EINVAL; + + return pinctrl_ops->get_count(pmx->ph, FUNCTION_TYPE); +} + +static const char *pinctrl_scmi_get_function_name(struct pinctrl_dev *pctl= dev, + unsigned int selector) +{ + int ret; + const char *name; + struct scmi_pinctrl *pmx; + + if (!pctldev) + return NULL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return NULL; + + ret =3D pinctrl_ops->get_name(pmx->ph, selector, FUNCTION_TYPE, &name); + if (ret) { + dev_err(pmx->dev, "get name failed with err %d", ret); + return NULL; + } + + return name; +} + +static int pinctrl_scmi_get_function_groups(struct pinctrl_dev *pctldev, + unsigned int selector, + const char * const **groups, + unsigned int * const num_groups) +{ + const unsigned int *group_ids; + int ret, i; + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph || !groups || !num_groups) + return -EINVAL; + + if (selector < pmx->nr_functions && + pmx->functions[selector].num_groups) { + *groups =3D (const char * const *)pmx->functions[selector].groups; + *num_groups =3D pmx->functions[selector].num_groups; + return 0; + } + + ret =3D pinctrl_ops->get_function_groups(pmx->ph, selector, + &pmx->functions[selector].num_groups, + &group_ids); + if (ret) { + dev_err(pmx->dev, "Unable to get function groups, err %d", ret); + return ret; + } + + *num_groups =3D pmx->functions[selector].num_groups; + if (!*num_groups) + return -EINVAL; + + pmx->functions[selector].groups =3D + devm_kcalloc(pmx->dev, *num_groups, + sizeof(*pmx->functions[selector].groups), + GFP_KERNEL); + if (!pmx->functions[selector].groups) + return -ENOMEM; + + for (i =3D 0; i < *num_groups; i++) { + pmx->functions[selector].groups[i] =3D + pinctrl_scmi_get_group_name(pmx->pctldev, + group_ids[i]); + if (!pmx->functions[selector].groups[i]) { + ret =3D -ENOMEM; + goto error; + } + } + + *groups =3D (const char * const *)pmx->functions[selector].groups; + + return 0; + +error: + kfree(pmx->functions[selector].groups); + + return ret; +} + +static int pinctrl_scmi_func_set_mux(struct pinctrl_dev *pctldev, + unsigned int selector, unsigned int group) +{ + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return -EINVAL; + + return pinctrl_ops->set_mux(pmx->ph, selector, group); +} + +static int pinctrl_scmi_request(struct pinctrl_dev *pctldev, + unsigned int offset) +{ + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return -EINVAL; + + return pinctrl_ops->request_pin(pmx->ph, offset); +} + +static int pinctrl_scmi_free(struct pinctrl_dev *pctldev, unsigned int off= set) +{ + struct scmi_pinctrl *pmx; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph) + return -EINVAL; + + return pinctrl_ops->free_pin(pmx->ph, offset); +} + +static const struct pinmux_ops pinctrl_scmi_pinmux_ops =3D { + .request =3D pinctrl_scmi_request, + .free =3D pinctrl_scmi_free, + .get_functions_count =3D pinctrl_scmi_get_functions_count, + .get_function_name =3D pinctrl_scmi_get_function_name, + .get_function_groups =3D pinctrl_scmi_get_function_groups, + .set_mux =3D pinctrl_scmi_func_set_mux, +}; + +static int pinctrl_scmi_pinconf_get(struct pinctrl_dev *pctldev, + unsigned int _pin, + unsigned long *config) +{ + int ret; + struct scmi_pinctrl *pmx; + enum pin_config_param config_type; + unsigned long config_value; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph || !config) + return -EINVAL; + + config_type =3D pinconf_to_config_param(*config); + + ret =3D pinctrl_ops->get_config(pmx->ph, _pin, PIN_TYPE, config_type, + (u32 *)&config_value); + if (ret) + return ret; + + *config =3D pinconf_to_config_packed(config_type, config_value); + + return 0; +} + +static int pinctrl_scmi_pinconf_set(struct pinctrl_dev *pctldev, + unsigned int _pin, + unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + struct scmi_pinctrl *pmx; + enum pin_config_param config_type; + unsigned long config_value; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph || !configs || num_configs =3D=3D 0) + return -EINVAL; + + for (i =3D 0; i < num_configs; i++) { + config_type =3D pinconf_to_config_param(configs[i]); + config_value =3D pinconf_to_config_argument(configs[i]); + + ret =3D pinctrl_ops->set_config(pmx->ph, _pin, PIN_TYPE, config_type, + config_value); + if (ret) { + dev_err(pmx->dev, "Error parsing config %ld\n", + configs[i]); + break; + } + } + + return ret; +} + +static int pinctrl_scmi_pinconf_group_set(struct pinctrl_dev *pctldev, + unsigned int group, + unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + struct scmi_pinctrl *pmx; + enum pin_config_param config_type; + unsigned long config_value; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph || !configs || num_configs =3D=3D 0) + return -EINVAL; + + for (i =3D 0; i < num_configs; i++) { + config_type =3D pinconf_to_config_param(configs[i]); + config_value =3D pinconf_to_config_argument(configs[i]); + + ret =3D pinctrl_ops->set_config(pmx->ph, group, GROUP_TYPE, + config_type, config_value); + if (ret) { + dev_err(pmx->dev, "Error parsing config =3D %ld", + configs[i]); + break; + } + } + + return ret; +}; + +static int pinctrl_scmi_pinconf_group_get(struct pinctrl_dev *pctldev, + unsigned int _pin, + unsigned long *config) +{ + int ret; + struct scmi_pinctrl *pmx; + enum pin_config_param config_type; + unsigned long config_value; + + if (!pctldev) + return -EINVAL; + + pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!pmx || !pmx->ph || !config) + return -EINVAL; + + config_type =3D pinconf_to_config_param(*config); + + ret =3D pinctrl_ops->get_config(pmx->ph, _pin, GROUP_TYPE, + config_type, (u32 *)&config_value); + if (ret) + return ret; + + *config =3D pinconf_to_config_packed(config_type, config_value); + + return 0; +} + +static const struct pinconf_ops pinctrl_scmi_pinconf_ops =3D { + .is_generic =3D true, + .pin_config_get =3D pinctrl_scmi_pinconf_get, + .pin_config_set =3D pinctrl_scmi_pinconf_set, + .pin_config_group_set =3D pinctrl_scmi_pinconf_group_set, + .pin_config_group_get =3D pinctrl_scmi_pinconf_group_get, + .pin_config_config_dbg_show =3D pinconf_generic_dump_config, +}; + +static int pinctrl_scmi_get_pins(struct scmi_pinctrl *pmx, + unsigned int *nr_pins, + const struct pinctrl_pin_desc **pins) +{ + int ret, i; + + if (!pmx || !pmx->ph) + return -EINVAL; + + if (!pins || !nr_pins) + return -EINVAL; + + if (pmx->nr_pins) { + *pins =3D pmx->pins; + *nr_pins =3D pmx->nr_pins; + return 0; + } + + *nr_pins =3D pinctrl_ops->get_count(pmx->ph, PIN_TYPE); + + pmx->nr_pins =3D *nr_pins; + pmx->pins =3D devm_kmalloc_array(pmx->dev, *nr_pins, sizeof(*pmx->pins), + GFP_KERNEL); + if (!pmx->pins) + return -ENOMEM; + + for (i =3D 0; i < *nr_pins; i++) { + pmx->pins[i].number =3D i; + ret =3D pinctrl_ops->get_name(pmx->ph, i, PIN_TYPE, + &pmx->pins[i].name); + if (ret) { + dev_err(pmx->dev, "Can't get name for pin %d: rc %d", + i, ret); + goto err; + } + } + + *pins =3D pmx->pins; + dev_dbg(pmx->dev, "got pins %d", *nr_pins); + + return 0; + err: + kfree(pmx->pins); + pmx->nr_pins =3D 0; + + return ret; +} + +static const struct scmi_device_id scmi_id_table[] =3D { + { SCMI_PROTOCOL_PINCTRL, "pinctrl" }, + { }, +}; +MODULE_DEVICE_TABLE(scmi, scmi_id_table); + +static int scmi_pinctrl_probe(struct scmi_device *sdev) +{ + int ret; + struct scmi_pinctrl *pmx; + const struct scmi_handle *handle; + struct scmi_protocol_handle *ph; + + if (!sdev || !sdev->handle) + return -EINVAL; + + handle =3D sdev->handle; + + pinctrl_ops =3D handle->devm_protocol_get(sdev, SCMI_PROTOCOL_PINCTRL, + &ph); + if (IS_ERR(pinctrl_ops)) + return PTR_ERR(pinctrl_ops); + + pmx =3D devm_kzalloc(&sdev->dev, sizeof(*pmx), GFP_KERNEL); + if (!pmx) + return -ENOMEM; + + pmx->ph =3D ph; + + pmx->dev =3D &sdev->dev; + pmx->pctl_desc.name =3D DRV_NAME; + pmx->pctl_desc.owner =3D THIS_MODULE; + pmx->pctl_desc.pctlops =3D &pinctrl_scmi_pinctrl_ops; + pmx->pctl_desc.pmxops =3D &pinctrl_scmi_pinmux_ops; + pmx->pctl_desc.confops =3D &pinctrl_scmi_pinconf_ops; + + ret =3D pinctrl_scmi_get_pins(pmx, &pmx->pctl_desc.npins, + &pmx->pctl_desc.pins); + if (ret) + goto clean; + + ret =3D devm_pinctrl_register_and_init(&sdev->dev, &pmx->pctl_desc, pmx, + &pmx->pctldev); + if (ret) { + dev_err(&sdev->dev, "could not register: %i\n", ret); + goto clean; + } + + pmx->nr_functions =3D pinctrl_scmi_get_functions_count(pmx->pctldev); + pmx->nr_groups =3D pinctrl_scmi_get_groups_count(pmx->pctldev); + + if (pmx->nr_functions) { + pmx->functions =3D + devm_kcalloc(&sdev->dev, pmx->nr_functions, + sizeof(*pmx->functions), + GFP_KERNEL); + if (!pmx->functions) { + ret =3D -ENOMEM; + goto clean; + } + } + + if (pmx->nr_groups) { + pmx->groups =3D + devm_kcalloc(&sdev->dev, pmx->nr_groups, + sizeof(*pmx->groups), + GFP_KERNEL); + if (!pmx->groups) { + ret =3D -ENOMEM; + goto clean; + } + } + + return pinctrl_enable(pmx->pctldev); + +clean: + if (pmx) { + kfree(pmx->functions); + kfree(pmx->groups); + } + + kfree(pmx); + + return ret; +} + +static struct scmi_driver scmi_pinctrl_driver =3D { + .name =3D DRV_NAME, + .probe =3D scmi_pinctrl_probe, + .id_table =3D scmi_id_table, +}; +module_scmi_driver(scmi_pinctrl_driver); + +MODULE_AUTHOR("Oleksii Moisieiev "); +MODULE_DESCRIPTION("ARM SCMI pin controller driver"); +MODULE_LICENSE("GPL"); --=20 2.25.1