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From:   andy.shevchenko@gmail.com
Date:   Wed, 26 Apr 2023 18:04:55 +0300
To:     Rohit Agarwal <quic_rohiagar@quicinc.com>
Cc:     agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org,
        linus.walleij@linaro.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, richardcochran@gmail.com,
        manivannan.sadhasivam@linaro.org, linux-arm-msm@vger.kernel.org,
        linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH v4 2/2] pinctrl: qcom: Add SDX75 pincontrol driver
Message-ID: <ZEk9lySMZcrRZYwX@surfacebook>
References: <1682327030-25535-1-git-send-email-quic_rohiagar@quicinc.com>
 <1682327030-25535-3-git-send-email-quic_rohiagar@quicinc.com>
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Mon, Apr 24, 2023 at 02:33:50PM +0530, Rohit Agarwal kirjoitti:
> Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
> with pinctrl framework for SDX75 SoC.
> While at it, reordering the SDX65 entry.

...

> +#define FUNCTION(fname)							\
> +	[msm_mux_##fname] = {						\
> +		.name = #fname,						\
> +		.groups = fname##_groups,				\
> +	.ngroups = ARRAY_SIZE(fname##_groups),				\
> +	}

PINCTRL_PINFUNCTION() ?

...

> +static const struct of_device_id sdx75_pinctrl_of_match[] = {
> +	{.compatible = "qcom,sdx75-tlmm", .data = &sdx75_pinctrl}, {},

One entry per line.
And drop comma in the terminator one.

> +};

No MODULE_DEVICE_TABLE()?

-- 
With Best Regards,
Andy Shevchenko