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From:   "Winkler, Tomas" <tomas.winkler@intel.com>
To:     Arnd Bergmann <arnd@arndb.de>, Adam Borowski <kilobyte@angband.pl>,
        "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Usyskin, Alexander" <alexander.usyskin@intel.com>
Subject: RE: [PATCH] mei: make hdcp and pxp depend on X86 && PCI
Thread-Topic: [PATCH] mei: make hdcp and pxp depend on X86 && PCI
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Date:   Wed, 26 Apr 2023 18:11:26 +0000
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>=20
> On Tue, Apr 25, 2023, at 16:27, Adam Borowski wrote:
> > On Tue, Apr 25, 2023 at 03:40:10PM +0200, Greg Kroah-Hartman wrote:
> >> On Tue, Apr 25, 2023 at 01:52:10PM +0200, Adam Borowski wrote:
> >> > On Tue, Apr 25, 2023 at 04:39:23AM +0000, Winkler, Tomas wrote:
> >> > > What is the exact issue you are experiencing, can you add the erro=
r
> message this fixes?
> >> >
> >> > The problem doesn't trigger in mainline
> >>
> >> Then it's nothing we need to worry about in mainline.  If/when other
> >> changes ever happen to need it here in mainline, we will gladly take
> >> the change.
> >>
> >> For obvious reasons, we can't take patches for issues outside of our
> >> codebase.  Nor do you want us to, as that way lies madness and an
> >> unmaintainable mess.
> >
> > The problem in mainline is inconsistency: out of 6 config items, 4
> > repeat the "depends on X86 && PCI" line, the other 2 do not.  There's
> > indeed no immediate functional issue, but I'd argue that a dormant bug =
is
> still a bug.

The MEI protocol (CONFIG_INTEL_MEI) is not PCI or X86 dependent.=20
INTEL_MEI_GSC is PCI dependent but not X86. (Hope I correct also on impleme=
ntation side)
They HW layers are currently X86 dependent.=20

> >
> > So we can fix the cosmetic (currently) issue on its own, or as part of
> > the large patchset -- the latter having a side effect of stuffing your
> > mailboxes more than needed (neither Greg, Arnd, nor Tomas are involved
> in other bits).
> >
> > But do the selects really require so much duplication?  Perhaps I'm
> > trying to fix the underlying issue wrong?
>=20
> I think something along these lines would do (untested):
>=20
> diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig index
> d21486d69df2..8e5d79cff80b 100644
> --- a/drivers/misc/mei/Kconfig
> +++ b/drivers/misc/mei/Kconfig
> @@ -1,6 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0
>  # Copyright (c) 2003-2019, Intel Corporation. All rights reserved.
> -config INTEL_MEI
> +menuconfig INTEL_MEI
>         tristate "Intel Management Engine Interface"
>         depends on X86 && PCI
>         help
> @@ -13,8 +13,6 @@ config INTEL_MEI
>=20
>  config INTEL_MEI_ME
>         tristate "ME Enabled Intel Chipsets"
> -       select INTEL_MEI
> -       depends on X86 && PCI
>         help
>           MEI support for ME Enabled Intel chipsets.
>=20
> @@ -38,8 +36,6 @@ config INTEL_MEI_ME
>=20
>  config INTEL_MEI_TXE
>         tristate "Intel Trusted Execution Environment with ME Interface"
> -       select INTEL_MEI
> -       depends on X86 && PCI
>         help
>           MEI Support for Trusted Execution Environment device on Intel S=
oCs
>=20
> @@ -48,9 +44,7 @@ config INTEL_MEI_TXE
>=20
>  config INTEL_MEI_GSC
>         tristate "Intel MEI GSC embedded device"
> -       depends on INTEL_MEI
>         depends on INTEL_MEI_ME
> -       depends on X86 && PCI
>         depends on DRM_I915
>         help
>           Intel auxiliary driver for GSC devices embedded in Intel graphi=
cs devices.
> @@ -63,3 +57,4 @@ config INTEL_MEI_GSC
>  source "drivers/misc/mei/hdcp/Kconfig"
>  source "drivers/misc/mei/pxp/Kconfig"
>=20
> +endmenu