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Subject: Re: [PATCH V2] arm64: dts: add support for C3 based Amlogic AW409
From:   Christian Hewitt <christian@hewittfamily.org.uk>
In-Reply-To: <20230427085859.793802-1-xianwei.zhao@amlogic.com>
Date:   Thu, 27 Apr 2023 10:26:47 +0100
Cc:     linux-arm-kernel@lists.infradead.org,
        LKML <linux-kernel@vger.kernel.org>,
        AML <linux-amlogic@lists.infradead.org>,
        devicetree <devicetree@vger.kernel.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Neil Armstrong <neil.armstrong@linaro.org>,
        Kevin Hilman <khilman@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
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Message-Id: <7C020F0D-315C-4281-BA0E-1E5CFAC97C39@hewittfamily.org.uk>
References: <20230427085859.793802-1-xianwei.zhao@amlogic.com>
To:     Xianwei Zhao <xianwei.zhao@amlogic.com>
Precedence: bulk


> On 27 Apr 2023, at 9:58 am, Xianwei Zhao <xianwei.zhao@amlogic.com> =
wrote:
>=20
> Amlogic C3 is an advanced edge AI processor designed for smart IP =
camera
> applications.
>=20
> Add basic support for the C3 based Amlogic AW409 board, which =
describes
> the following components: CPU, GIC, IRQ, Timer, UART. It's capable of
> booting up into the serial console.
>=20
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
>=20
> ---
> V1 -> V2: Remove new arch, and use ARCH_MESON;
>          Modify node name, and delete superfluous blank lines.
> ---
> arch/arm64/boot/dts/amlogic/Makefile          |  1 +
> .../amlogic/amlogic-c3-c302x-aw409-256m.dts   | 29 +++++++
> arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi   | 86 +++++++++++++++++++
> 3 files changed, 116 insertions(+)
> create mode 100644 =
arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts
> create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
>=20
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile =
b/arch/arm64/boot/dts/amlogic/Makefile
> index cd1c5b04890a..bcec872c2444 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -74,3 +74,4 @@ dtb-$(CONFIG_ARCH_MESON) +=3D =
meson-sm1-odroid-hc4.dtb
> dtb-$(CONFIG_ARCH_MESON) +=3D meson-sm1-sei610.dtb
> dtb-$(CONFIG_ARCH_MESON) +=3D meson-sm1-x96-air-gbit.dtb
> dtb-$(CONFIG_ARCH_MESON) +=3D meson-sm1-x96-air.dtb
> +dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c302x-aw409-256m.dtb

^ please keep the list alpha-sorted, and 256m is described in the dts
so there is no need to include it in the board filename. I would also
expect meson-c3* to align with existing filenames, but I=E2=80=99ll let =
others
comment on naming rules.

Christian

> diff --git =
a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts =
b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts
> new file mode 100644
> index 000000000000..edce8850b338
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts
> @@ -0,0 +1,29 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-c3.dtsi"
> +
> +/ {
> +	model =3D "Amlogic C302 aw409 Development Board";
> +	compatible =3D "amlogic,aw409", "amlogic,c3";
> +	interrupt-parent =3D <&gic>;
> +	#address-cells =3D <2>;
> +	#size-cells =3D <2>;
> +
> +	aliases {
> +		serial0 =3D &uart_b;
> +	};
> +
> +	memory@0 {
> +		device_type =3D "memory";
> +		reg =3D <0x0 0x0 0x0 0x10000000>;
> +	};
> +};
> +
> +&uart_b {
> +	status =3D "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi =
b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> new file mode 100644
> index 000000000000..93b335aef605
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> @@ -0,0 +1,86 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +	cpus {
> +		#address-cells =3D <2>;
> +		#size-cells =3D <0>;
> +
> +		cpu0: cpu@0 {
> +			device_type =3D "cpu";
> +			compatible =3D "arm,cortex-a35";
> +			reg =3D <0x0 0x0>;
> +			enable-method =3D "psci";
> +		};
> +
> +		cpu1: cpu@1 {
> +			device_type =3D "cpu";
> +			compatible =3D "arm,cortex-a35";
> +			reg =3D <0x0 0x1>;
> +			enable-method =3D "psci";
> +		};
> +	};
> +
> +	timer {
> +		compatible =3D "arm,armv8-timer";
> +		interrupts =3D <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | =
IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | =
IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | =
IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | =
IRQ_TYPE_LEVEL_LOW)>;
> +	};
> +
> +	psci {
> +		compatible =3D "arm,psci-1.0";
> +		method =3D "smc";
> +	};
> +
> +	xtal: xtal-clk {
> +		compatible =3D "fixed-clock";
> +		clock-frequency =3D <24000000>;
> +		clock-output-names =3D "xtal";
> +		#clock-cells =3D <0>;
> +	};
> +
> +	soc {
> +		compatible =3D "simple-bus";
> +		#address-cells =3D <2>;
> +		#size-cells =3D <2>;
> +		ranges;
> +
> +		gic: interrupt-controller@fff01000 {
> +			compatible =3D "arm,gic-400";
> +			#interrupt-cells =3D <3>;
> +			#address-cells =3D <0>;
> +			interrupt-controller;
> +			reg =3D <0x0 0xfff01000 0 0x1000>,
> +			      <0x0 0xfff02000 0 0x2000>,
> +			      <0x0 0xfff04000 0 0x2000>,
> +			      <0x0 0xfff06000 0 0x2000>;
> +			interrupts =3D <GIC_PPI 9 =
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> +		};
> +
> +		apb4: bus@fe000000 {
> +			compatible =3D "simple-bus";
> +			reg =3D <0x0 0xfe000000 0x0 0x480000>;
> +			#address-cells =3D <2>;
> +			#size-cells =3D <2>;
> +			ranges =3D <0x0 0x0 0x0 0xfe000000 0x0 =
0x480000>;
> +
> +			uart_b: serial@7a000 {
> +				compatible =3D =
"amlogic,meson-g12a-uart";
> +				reg =3D <0x0 0x7a000 0x0 0x18>;
> +				interrupts =3D <GIC_SPI 169 =
IRQ_TYPE_EDGE_RISING>;
> +				status =3D "disabled";
> +				clocks =3D <&xtal>, <&xtal>, <&xtal>;
> +				clock-names =3D "xtal", "pclk", "baud";
> +			};
> +
> +		};
> +	};
> +};
>=20
> base-commit: ae68fb187b59bc8645974320808ab2d7c41b1833
> --=20
> 2.37.1
>=20
>=20
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