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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 3-20020a631243000000b0051b930ef84bsi20990238pgs.140.2023.04.30.05.44.45; Sun, 30 Apr 2023 05:44:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229565AbjD3Mom (ORCPT + 99 others); Sun, 30 Apr 2023 08:44:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229461AbjD3Mol (ORCPT ); Sun, 30 Apr 2023 08:44:41 -0400 Received: from fudo.makrotopia.org (fudo.makrotopia.org [IPv6:2a07:2ec0:3002::71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D367A19A6; Sun, 30 Apr 2023 05:44:39 -0700 (PDT) Received: from local by fudo.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pt6PZ-0003Fb-2r; Sun, 30 Apr 2023 14:44:18 +0200 Date: Sun, 30 Apr 2023 13:44:12 +0100 From: Daniel Golle To: =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= Cc: David Bauer , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Landen Chao , DENG Qingfang , Sean Wang , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH 2/2] dt-bindings: net: dsa: mediatek,mt7530: document MDIO-bus Message-ID: References: <20230430112834.11520-1-mail@david-bauer.net> <20230430112834.11520-2-mail@david-bauer.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Apr 30, 2023 at 03:34:43PM +0300, Arınç ÜNAL wrote: > On 30.04.2023 14:28, David Bauer wrote: > > Document the ability to add nodes for the MDIO bus connecting the > > switch-internal PHYs. > > This is quite interesting. Currently the PHY muxing feature for the MT7530 > switch looks for some fake ethernet-phy definitions on the mdio-bus where > the switch is also defined. > > Looking at the binding here, there will be an mdio node under the switch > node. This could be useful to define the ethernet-phys for PHY muxing here > instead, so we don't waste the register addresses on the parent mdio-bus for > fake things. It looks like this should work right out of the box. I will do > some tests. > > Are there any examples as to what to configure on the switch PHYs with this > change? > > > > > Signed-off-by: David Bauer > > --- > > .../devicetree/bindings/net/dsa/mediatek,mt7530.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml > > index e532c6b795f4..50f8f83cc440 100644 > > --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml > > +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml > > @@ -128,6 +128,12 @@ properties: > > See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for > > details for the regulator setup on these boards. > > + mdio: > > + $ref: /schemas/net/mdio.yaml# > > + unevaluatedProperties: false > > + description: > > + Node for the internal MDIO bus connected to the embedded ethernet-PHYs. > > Please set this property as false for mediatek,mt7988-switch as it doesn't > use MDIO. Well, quite the opposite is true. This change is **needed** on MT7988 as the built-in 1GE PHYs of the MT7988 are connected to the (internal) MDIO bus of the switch. And they do need calibration data assigned as nvmem via device tree. tl;dr: Despite not being connected via MDIO itself also MT7988 exposes an internal MDIO bus for the switch PHYs.