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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Christian Brauner , Richard Cochran , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , linux-fsdevel@vger.kernel.org, linux-perf-users@vger.kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, Oleg Nesterov , John Hubbard , Jan Kara , "Kirill A . Shutemov" , Pavel Begunkov , Mika Penttila , Dave Chinner , "Theodore Ts'o" , Peter Xu References: <7d56b424-ba79-4b21-b02c-c89705533852@lucifer.local> <1ffbbfb7-6bca-0ab0-1a96-9ca81d5fa373@redhat.com> From: Matthew Rosato In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: CxJFWMTr1AwlmvE516RFOxxqp85_cQ7r X-Proofpoint-ORIG-GUID: uXjpuXEqJyPIOFcBwIU_BPTS0bXnzkZb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-02_09,2023-04-27_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 phishscore=0 spamscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 mlxscore=0 priorityscore=1501 mlxlogscore=842 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305020124 X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/2/23 10:15 AM, David Hildenbrand wrote: > On 02.05.23 16:04, Jason Gunthorpe wrote: >> On Tue, May 02, 2023 at 03:57:30PM +0200, David Hildenbrand wrote: >>> On 02.05.23 15:50, Jason Gunthorpe wrote: >>>> On Tue, May 02, 2023 at 03:47:43PM +0200, David Hildenbrand wrote: >>>>>> Eventually we want to implement a mechanism where we can dynamically pin in response to RPCIT. >>>>> >>>>> Okay, so IIRC we'll fail starting the domain early, that's good. And if we >>>>> pin all guest memory (instead of small pieces dynamically), there is little >>>>> existing use for file-backed RAM in such zPCI configurations (because memory >>>>> cannot be reclaimed either way if it's all pinned), so likely there are no >>>>> real existing users. >>>> >>>> Right, this is VFIO, the physical HW can't tolerate not having pinned >>>> memory, so something somewhere is always pinning it. >>>> >>>> Which, again, makes it weird/wrong that this KVM code is pinning it >>>> again :\ >>> >>> IIUC, that pinning is not for ordinary IOMMU / KVM memory access. It's for >>> passthrough of (adapter) interrupts. >>> >>> I have to speculate, but I guess for hardware to forward interrupts to the >>> VM, it has to pin the special guest memory page that will receive the >>> indications, to then configure (interrupt) hardware to target the interrupt >>> indications to that special guest page (using a host physical address). >> >> Either the emulated access is "CPU" based happening through the KVM >> page table so it should use mmu_notifier locking. >> >> Or it is "DMA" and should go through an IOVA through iommufd pinning >> and locking. >> >> There is no other ground, nothing in KVM should be inventing its own >> access methodology. > > I might be wrong, but this seems to be a bit different. > > It cannot tolerate page faults (needs a host physical address), so memory notifiers don't really apply. (as a side note, KVM on s390x does not use mmu notifiers as we know them) The host physical address is one shared between underlying firmware and the host kvm. Either might make changes to the referenced page and then issue an alert to the guest via a mechanism called GISA, giving impetus to the guest to look at that page and process the event. As you say, firmware can't tolerate the page being unavailable; it's expecting that once we feed it that location it's always available until we remove it (kvm_s390_pci_aif_disable). > > It's kind-of like DMA, but it's not really DMA.  It's the CPU delivering interrupts for a specific device. So we're configuring the interrupt controller I guess to target a guest memory page. > > But I have way too little knowledge about zPCI and the code in question here. And if it could be converted to iommufd (and if that's really the right mechanism to use here). > > Hopefully Matthew knows the details and if this really needs to be special :) I think I need to have a look at mmu_notifiers to understand that better, but in the end firmware still needs a reliable page to deliver events to.