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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Wed, 3 May 2023 12:47:37 +0300
Message-ID: <CAHp75Ve0FqX7=x3B5eaCfj0AE5m1qMXGrYzLoHzqbLY7gdOSOg@mail.gmail.com>
Subject: Re: [PATCH v5 3/3] pinctrl: qcom: Add SDX75 pincontrol driver
To:     Rohit Agarwal <quic_rohiagar@quicinc.com>
Cc:     agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org,
        linus.walleij@linaro.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, richardcochran@gmail.com,
        manivannan.sadhasivam@linaro.org, linux-arm-msm@vger.kernel.org,
        linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, netdev@vger.kernel.org
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On Wed, May 3, 2023 at 8:39=E2=80=AFAM Rohit Agarwal <quic_rohiagar@quicinc=
.com> wrote:
>
> Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
> with pinctrl framework for SDX75 SoC.
> While at it, reordering the SDX65 entry.

...

> +#define FUNCTION(n)                                                    \
> +       [msm_mux_##n] =3D {                                              =
 \
> +                       .func =3D PINCTRL_PINFUNCTION(#n,                =
 \
> +                                       n##_groups,                     \
> +                                       ARRAY_SIZE(n##_groups))         \
> +                       }

Or even define

  #define MSM_PIN_FUNCTION(fname) \
      [msm_mux_##fname] =3D PINCTRL_PINFUNCTION(...)

in the header for all MSM related controllers.

All the same for the rest groups (if any), otherwise use redefinition
of FUNCTION inside each file.

--=20
With Best Regards,
Andy Shevchenko