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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: NCubpt8ns_d3_3WbCZ13bunCw8m2fhg9 X-Proofpoint-ORIG-GUID: NCubpt8ns_d3_3WbCZ13bunCw8m2fhg9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_14,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 impostorscore=0 phishscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 mlxscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030171 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/3/2023 11:55 AM, Dmitry Baryshkov wrote: > On 03/05/2023 20:45, Kuogee Hsieh wrote: >> >> On 5/2/2023 3:42 PM, Dmitry Baryshkov wrote: >>> On 03/05/2023 00:02, Kuogee Hsieh wrote: >>>> At legacy chipsets, it required DPU_PINGPONG_DSC bit be set to >>>> indicate >>>> pingpong ops functions are required to complete DSC data path setup if >>>> this chipset has DSC hardware block presented. This patch add >>>> DPU_PINGPONG_DSC bit to both PP_BLK and PP_BLK_TE marcos if it has DSC >>>> hardware block presented. >>>> >>>> Signed-off-by: Kuogee Hsieh >>>> --- >>>>   .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h    | 12 +++++----- >>>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h |  8 +++---- >>>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 26 >>>> ++++++++++------------ >>>>   .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h    | 24 >>>> ++++++++++---------- >>>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 26 >>>> ++++++++++------------ >>>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h |  4 ++-- >>>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h |  2 +- >>>>   .../drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h    |  2 +- >>>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |  8 +++---- >>>>   9 files changed, 54 insertions(+), 58 deletions(-) >>>> >>>> diff --git >>>> a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h >>>> b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h >>>> index 17f821c..b7cd746 100644 >>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h >>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h >>>> @@ -112,16 +112,16 @@ static const struct dpu_lm_cfg msm8998_lm[] = { >>>>   }; >>>>     static const struct dpu_pingpong_cfg msm8998_pp[] = { >>>> -    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0, >>>> sdm845_pp_sblk_te, >>>> -            DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), >>>> +    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, >>>> BIT(DPU_PINGPONG_DSC), 0, >>>> +            sdm845_pp_sblk_te, DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)), >>>> -    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0, >>>> sdm845_pp_sblk_te, >>>> -            DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), >>>> +    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, >>>> BIT(DPU_PINGPONG_DSC), 0, >>>> +            sdm845_pp_sblk_te, DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)), >>>> -    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, sdm845_pp_sblk, >>>> +    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, 0, sdm845_pp_sblk, >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)), >>>> -    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, sdm845_pp_sblk, >>>> +    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, 0, sdm845_pp_sblk, >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)), >>> >>> Just to doublecheck: why don't we have DPU_PINGPONG_DSC for PP_3/_4? >>> We do have them on sdm845. Is it because we should not use DSC with >>> thos PINGPONG blocks? >>> >> I think it only have two DSPP connect to pp blocks > > So, can they be connected to PP3/4 or not? no, my previous reply is not correct. original i though pp_3/_4 are for write back. but this not correct, 2 dspp can connect to pp_3/_4 also. I will add DPU_PINGPONG_DSC to pp_3/_4. > >>>>   }; >>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >>>> b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >>>> index ceca741..8888bd9 100644 >>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >>>> @@ -110,16 +110,16 @@ static const struct dpu_lm_cfg sdm845_lm[] = { >>>>   }; >>>>     static const struct dpu_pingpong_cfg sdm845_pp[] = { >>>> -    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0, >>>> sdm845_pp_sblk_te, >>>> +    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, >>>> BIT(DPU_PINGPONG_DSC), 0, sdm845_pp_sblk_te, >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)), >>>> -    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0, >>>> sdm845_pp_sblk_te, >>>> +    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, >>>> BIT(DPU_PINGPONG_DSC), 0, sdm845_pp_sblk_te, >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)), >>>> -    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, sdm845_pp_sblk, >>>> +    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, >>>> BIT(DPU_PINGPONG_DSC), 0, sdm845_pp_sblk, >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)), >>>> -    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, sdm845_pp_sblk, >>>> +    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, >>>> BIT(DPU_PINGPONG_DSC), 0, sdm845_pp_sblk, >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), >>>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)), >>>> >>> >>> [skipped the rest, looks good to me] >>> >