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Message-ID: <9672285c-d81c-2ef5-46bc-13708392b5aa@quicinc.com>
Date:   Thu, 4 May 2023 09:57:27 +0530
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Subject: Re: [PATCH v7 5/9] usb: dwc3: core: Refactor PHY logic to support
 Multiport Controller
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To:     Thinh Nguyen <Thinh.Nguyen@synopsys.com>
CC:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Felipe Balbi <balbi@kernel.org>,
        "Wesley Cheng" <quic_wcheng@quicinc.com>,
        "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "quic_pkondeti@quicinc.com" <quic_pkondeti@quicinc.com>,
        "quic_ppratap@quicinc.com" <quic_ppratap@quicinc.com>,
        "quic_jackp@quicinc.com" <quic_jackp@quicinc.com>,
        "quic_harshq@quicinc.com" <quic_harshq@quicinc.com>,
        "ahalaney@redhat.com" <ahalaney@redhat.com>,
        "quic_shazhuss@quicinc.com" <quic_shazhuss@quicinc.com>
References: <20230501143445.3851-1-quic_kriskura@quicinc.com>
 <20230501143445.3851-6-quic_kriskura@quicinc.com>
 <20230502221100.ecska23anlzv3iwq@synopsys.com>
 <f55fbdc1-444c-eba5-02f4-aeab7a1b6f04@quicinc.com>
 <20230503215511.52udfef6amdcapng@synopsys.com>
From:   Krishna Kurapati PSSNV <quic_kriskura@quicinc.com>
In-Reply-To: <20230503215511.52udfef6amdcapng@synopsys.com>
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On 5/4/2023 3:25 AM, Thinh Nguyen wrote:
> On Wed, May 03, 2023, Krishna Kurapati PSSNV wrote:
>>
>>
>> On 5/3/2023 3:41 AM, Thinh Nguyen wrote:
>>> On Mon, May 01, 2023, Krishna Kurapati wrote:
>>>> Currently the DWC3 driver supports only single port controller
>>>> which requires at most one HS and one SS PHY.
>>>>
>>>> But the DWC3 USB controller can be connected to multiple ports and
>>>> each port can have their own PHYs. Each port of the multiport
>>>> controller can either be HS+SS capable or HS only capable
>>>> Proper quantification of them is required to modify GUSB2PHYCFG
>>>> and GUSB3PIPECTL registers appropriately.
>>>>
>>>> Add support for detecting, obtaining and configuring phy's supported
>>>> by a multiport controller and limit the max number of ports
>>>> supported to 4.
>>>>
>>>> Signed-off-by: Harsh Agarwal <quic_harshq@quicinc.com>
>>>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
>>>
>>> Are you a co-author or only Harsh is the main author of this patch?
>>>
>> Harsh began developing this series and pushed the first 3 RFC versions
>> (supporting both usb-phy / generic phy frameworks) until maintainers pointed
>> out that we only support generic phy changes.
>>
>>  From then on I took it up and started pushing next versions. I would say
>> both of us are primary authors for this patch. But if there has to be only
>> one, I would say its Harsh.
>>
>> Regards,
>> Krishna,
>>
> 
> I just want to check to give you proper credit for the patch's
> contribution. Since Harsh isn't the only one working on this you're not
> simply transporting this change. Perhaps you should add Co-developed-by
> tags.
> 
> Thanks,
> Thinh

Sure,

  Let me put myself under Co-developed-by in the next version.

Regards,
Krishna,