Received: by 2002:a05:6358:9144:b0:117:f937:c515 with SMTP id r4csp423767rwr; Thu, 4 May 2023 05:14:49 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ52ZmsNw04YRPP0tCGQ0C0QnaqY3/YXWGioCDUXeD8Y9p17Pevy5f1PAqSuIi5xBgOG/n54 X-Received: by 2002:a17:902:c1cd:b0:1ac:2d81:3ce9 with SMTP id c13-20020a170902c1cd00b001ac2d813ce9mr1717286plc.18.1683202489280; Thu, 04 May 2023 05:14:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683202489; cv=none; d=google.com; s=arc-20160816; b=k4EzeFYB0aPV4dse1LfRAmAmpjT06Kxx2HmFgKkpBlxZ0lVjDTNZ2XS2cdHbXCiKYk z2XVYPq/dDDA0X6BjYX5LEN2UDaUGsM2UawM4PkwOwBH4LSHM1ubSFyppPBFeBgbDvTT TfRFu2NNwetHHSYlHsVR6vVYnmrVEE0tAib0LZR3tdnmNGonC3wu5Cc6kaUHZV/t5Q/k 5g+C5Y7MeJ+V06OjRE3a3cUKGQ1/qTSpm6B5TZszff0ft9Dga/aiBLPLKtjsWxfH0rf5 n/YELad9r/WmSH8apvG3pzZ1xG4O6FUbHQD4oh5WklKrlXk7PZvpDQ8zyBiLLZwWgsnb +emA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:dkim-signature; bh=Dbu5qyYWZQkEinvxkuN7EfgdmcEyIwFauHLsvIRwG7s=; b=G+Yr4tCP27tt+hvxQADEIxjyesBokoXjwLdetJ7tHdvXwF1HTRhtQidS2bwoAmYIii VxLr8wmECxAkcHDbmDbWcZHQyNvCEzvQtDpkEK6k5hpuBuWJuVmFxFKIaUnqc6y63Hwc 5ZJnQEiy948QZ2ghC+hCsJQzkAgi60dKzo6H7zFooHHtDJ+VDLlo1qiuWV2U2mign+CK bCMPdB4+XbDs0gDiGuTcLqMoL4kejq7SEfVhWfBNzVQ3eNz6FcOT20/gmDFu7PA07VAx F5rqt+UtmyLn8VL6/JPmV3jQ7uZ+P0goeaIdpYNFON94vm0kDBIJnBLWasT4bYEUWsPO UDiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PfeCetWo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u8-20020a170903124800b001a9b9c32ab7si18351651plh.624.2023.05.04.05.14.34; Thu, 04 May 2023 05:14:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PfeCetWo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230358AbjEDMKj (ORCPT + 99 others); Thu, 4 May 2023 08:10:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230306AbjEDMKh (ORCPT ); Thu, 4 May 2023 08:10:37 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A820619F; Thu, 4 May 2023 05:10:33 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 344CAPEf053045; Thu, 4 May 2023 07:10:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1683202225; bh=Dbu5qyYWZQkEinvxkuN7EfgdmcEyIwFauHLsvIRwG7s=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=PfeCetWo1Q3ZLzsGOt6/5TLLgE/Zh6EYfhSqYfy49jF6lhhMBxmx6okKvRzW9nKy+ Cgt7fibslRxKWqvth/0qmVCb/B1aT8fsFava88Y3K4bbNee6lB5qwR7L4CCT2HRCpx +YKH3L7yxxXim/QN0I1DXRgsFbORHKfG2mKw4uN4= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 344CAPto123332 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 4 May 2023 07:10:25 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 4 May 2023 07:10:25 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 4 May 2023 07:10:25 -0500 Received: from [172.24.147.77] (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 344CAMPH035120; Thu, 4 May 2023 07:10:22 -0500 Message-ID: <67eccecb-f4a4-7f15-5316-27fd39e65b51@ti.com> Date: Thu, 4 May 2023 17:40:21 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets To: Nishanth Menon CC: Tero Kristo , Rob Herring , Krzysztof Kozlowski , , , , Andrew Davis , Vignesh Raghavendra , Apurva Nandan , Udit Kumar References: <20230503083143.32369-1-t-konduru@ti.com> <20230503114625.gqnijd3bog5bwemz@parameter> <31b31af7-6c54-7d05-f7ef-fcceba48580e@ti.com> <20230504115207.h6trzy4mqjcbkcm3@comment> Content-Language: en-US From: Thejasvi Konduru In-Reply-To: <20230504115207.h6trzy4mqjcbkcm3@comment> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/05/23 17:22, Nishanth Menon wrote: > On 14:36-20230504, Thejasvi Konduru wrote: >> On 03/05/23 17:16, Nishanth Menon wrote: >>> On 14:01-20230503, Thejasvi Konduru wrote: >>>> The wkup_pmx register region in j784s4 has multiple non-addressable >>>> regions, hence the existing wkup_pmx region is split as follows to >>>> avoid the non-addressable regions. The pinctrl node offsets are >>>> also corrected as per the newly split wkup_pmx* nodes. >>>> >>>> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12) >>>> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24) >>>> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97) >>>> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100) >>>> >>>> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") >>>> Signed-off-by: Thejasvi Konduru >>>> --- >>> Could you provide a link to the output of: >>> $ cat /sys/kernel/debug/pinctrl/*/pins >> https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a > Was this failing prior to this patch? Trying to understand the "Fix" > aspect of this patch. > Yes,it was failing prior to this patch.