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From:   Atish Kumar Patra <atishp@rivosinc.com>
Date:   Fri, 5 May 2023 02:12:13 +0530
Message-ID: <CAHBxVyE6Hy8R3BY2_71az5__UxHyOQcjf-hRm6ivTpXNSyCj6Q@mail.gmail.com>
Subject: Re: [PATCH v1] dt-bindings: perf: riscv,pmu: fix property dependencies
To:     Rob Herring <robh@kernel.org>
Cc:     Conor Dooley <conor@kernel.org>,
        Conor Dooley <conor.dooley@microchip.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Andrew Jones <ajones@ventanamicro.com>,
        devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
        linux-kernel@vger.kernel.org
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On Fri, May 5, 2023 at 1:51=E2=80=AFAM Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Apr 04, 2023 at 07:03:22PM +0100, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Seemingly I mis-implemented the dependencies here. The OpenSBI docs onl=
y
> > point out that the "riscv,event-to-mhpmcounters property is mandatory i=
f
> > riscv,event-to-mhpmevent is present". It never claims that
> > riscv,event-to-mhpmcounters requires riscv,event-to-mhpmevent.
> >
> > Drop the dependency of riscv,event-to-mhpmcounters on
> > riscv,event-to-mhpmevent.
> >
> > Fixes: 7e38085d9c59 ("dt-bindings: riscv: add SBI PMU event mappings")
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >
> > Atish, I'm not 100% on this one but I noticed it while doing dt-validat=
e
> > on a dump of the qemu virt machine which doesn't use the
> > event-to-mhpmevent property.

Yes. That's correct. virt machine uses default encoding specified by
the SBI PMU spec.
Hence, event-to-mhpmevent is not used.

>
> Waiting for comments before I apply this...
>

Sorry for the delay. Not sure why this did not show up in my gmail.
Probably due to all the bouncing issues going on.


Reviewed-by: Atish Patra <atishp@rivosinc.com>

> >
> > CC: Rob Herring <robh+dt@kernel.org>
> > CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > CC: Paul Walmsley <paul.walmsley@sifive.com>
> > CC: Palmer Dabbelt <palmer@dabbelt.com>
> > CC: Atish Patra <atishp@rivosinc.com>
> > CC: Andrew Jones <ajones@ventanamicro.com>
> > CC: devicetree@vger.kernel.org
> > CC: linux-riscv@lists.infradead.org
> > CC: linux-kernel@vger.kernel.org
> > ---
> >  Documentation/devicetree/bindings/perf/riscv,pmu.yaml | 1 -
> >  1 file changed, 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/perf/riscv,pmu.yaml b/Do=
cumentation/devicetree/bindings/perf/riscv,pmu.yaml
> > index a55a4d047d3f..c8448de2f2a0 100644
> > --- a/Documentation/devicetree/bindings/perf/riscv,pmu.yaml
> > +++ b/Documentation/devicetree/bindings/perf/riscv,pmu.yaml
> > @@ -91,7 +91,6 @@ properties:
> >
> >  dependencies:
> >    "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ]
> > -  "riscv,event-to-mhpmcounters": [ "riscv,event-to-mhpmevent" ]
> >
> >  required:
> >    - compatible
> > --
> > 2.39.2
> >