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References: <20230427142934.55435-1-francesco@dolcini.it> <20230427142934.55435-2-francesco@dolcini.it>
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From:   Robert Foss <rfoss@kernel.org>
Date:   Fri, 5 May 2023 19:35:43 +0200
Message-ID: <CAN6tsi7Ja3jhMJEEU2AaGm9A9uRjMK_hhXHF_iTDcbmpbZxvCg@mail.gmail.com>
Subject: Re: [PATCH v1 1/9] drm/bridge: tc358768: always enable HS video mode
To:     Francesco Dolcini <francesco@dolcini.it>
Cc:     Andrzej Hajda <andrzej.hajda@intel.com>,
        Neil Armstrong <neil.armstrong@linaro.org>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Jonas Karlman <jonas@kwiboo.se>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        tomi.valkeinen@ideasonboard.com, dri-devel@lists.freedesktop.org,
        Francesco Dolcini <francesco.dolcini@toradex.com>,
        linux-kernel@vger.kernel.org
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On Thu, Apr 27, 2023 at 4:34=E2=80=AFPM Francesco Dolcini <francesco@dolcin=
i.it> wrote:
>
> From: Francesco Dolcini <francesco.dolcini@toradex.com>
>
> Always enable HS video mode setting the TXMD bit, without this change no
> video output is present with DSI sinks that are setting
> MIPI_DSI_MODE_LPM flag (tested with LT8912B DSI-HDMI bridge).
>
> Previously the driver was enabling HS mode only when the DSI sink was
> not explicitly setting the MIPI_DSI_MODE_LPM, however this is not
> correct.
>
> The MIPI_DSI_MODE_LPM is supposed to indicate that the sink is willing
> to receive data in low power mode, however clearing the
> TC358768_DSI_CONTROL_TXMD bit will make the TC358768 send video in
> LP mode that is not the intended behavior.
>
> Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver")
> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> ---
>  drivers/gpu/drm/bridge/tc358768.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/t=
c358768.c
> index 7c0cbe84611b..8f349bf4fc32 100644
> --- a/drivers/gpu/drm/bridge/tc358768.c
> +++ b/drivers/gpu/drm/bridge/tc358768.c
> @@ -866,8 +866,7 @@ static void tc358768_bridge_pre_enable(struct drm_bri=
dge *bridge)
>         val =3D TC358768_DSI_CONFW_MODE_SET | TC358768_DSI_CONFW_ADDR_DSI=
_CONTROL;
>         val |=3D (dsi_dev->lanes - 1) << 1;
>
> -       if (!(dsi_dev->mode_flags & MIPI_DSI_MODE_LPM))
> -               val |=3D TC358768_DSI_CONTROL_TXMD;
> +       val |=3D TC358768_DSI_CONTROL_TXMD;
>
>         if (!(mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
>                 val |=3D TC358768_DSI_CONTROL_HSCKMD;
> --
> 2.25.1
>

Reviewed-by: Robert Foss <rfoss@kernel.org>