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Message-ID: <fb54d3f550883ec7eb92a41261dabcc196634e33.camel@linux.intel.com>
Subject: Re: [PATCH 5/6] sched/fair: Consider the idle state of the whole
 core for load balance
From:   Tim Chen <tim.c.chen@linux.intel.com>
To:     Hillf Danton <hdanton@sina.com>
Cc:     Peter Zijlstra <peterz@infradead.org>,
        Ricardo Neri <ricardo.neri@intel.com>,
        Mel Gorman <mgorman@suse.de>, linux-kernel@vger.kernel.org
Date:   Fri, 05 May 2023 15:49:08 -0700
In-Reply-To: <20230505071735.4083-1-hdanton@sina.com>
References: <cover.1683156492.git.tim.c.chen@linux.intel.com>
         <20230505071735.4083-1-hdanton@sina.com>
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On Fri, 2023-05-05 at 15:17 +0800, Hillf Danton wrote:
> On 4 May 2023 09:09:55 -0700 Tim Chen <tim.c.chen@linux.intel.com>
> > From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> >=20
> > should_we_balance() traverses the group_balance_mask (AND'ed with lb_en=
v::
> > cpus) starting from lower numbered CPUs looking for the first idle CPU.
> >=20
> > In hybrid x86 systems, the siblings of SMT cores get CPU numbers, befor=
e
> > non-SMT cores:
> >=20
> > 	[0, 1] [2, 3] [4, 5] 5 6 7 8
> >        b  i   b  i   b  i  b i i i
> >=20
> > In the figure above, CPUs in brackets are siblings of an SMT core. The
> > rest are non-SMT cores. 'b' indicates a busy CPU, 'i' indicates an
> > idle CPU.
>=20
> Better if l2-cache affinity is added in the diagram above. And better
> again if the diagram is available upon introducing hybrid x86 in the
> cover letter.

Good suggestion.  Will update the diagram and add it to cover letter.

Tim