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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a21-20020a17090acb9500b0024799a3324dsi9365572pju.162.2023.05.06.16.08.20; Sat, 06 May 2023 16:08:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229619AbjEFWAu (ORCPT + 99 others); Sat, 6 May 2023 18:00:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230106AbjEFWAM (ORCPT ); Sat, 6 May 2023 18:00:12 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9BF3C2ABE2; Sat, 6 May 2023 15:00:00 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1ABA1FB; Sat, 6 May 2023 15:00:44 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 822373F5A1; Sat, 6 May 2023 14:59:57 -0700 (PDT) Date: Sat, 6 May 2023 22:59:42 +0100 From: Andre Przywara To: Maksim Kiselev Cc: Icenowy Zheng , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 6/6] riscv: dts: allwinner: d1: Add SPI0 controller node Message-ID: <20230506225942.017a968f@slackpad.lan> In-Reply-To: <20230506073018.1411583-7-bigunclemax@gmail.com> References: <20230506073018.1411583-1-bigunclemax@gmail.com> <20230506073018.1411583-7-bigunclemax@gmail.com> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 6 May 2023 10:30:14 +0300 Maksim Kiselev wrote: Hi, > Some boards form the MangoPi family (MQ\MQ-Dual\MQ-R) may have > an optional SPI flash that connects to the SPI0 controller. > > This controller is the same for R329/D1/R528/T113s SoCs and > should be supported by the sun50i-r329-spi driver. > > So let's add its DT node. > > Signed-off-by: Maksim Kiselev > --- > .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 21 +++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index 922e8e0e2c09..a52999240a8e 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -108,6 +108,12 @@ rmii_pe_pins: rmii-pe-pins { > function = "emac"; > }; > > + /omit-if-no-ref/ > + spi0_pins: spi0-pins { > + pins = "PC2", "PC3", "PC4", "PC5"; > + function = "spi0"; > + }; > + > /omit-if-no-ref/ > uart1_pg6_pins: uart1-pg6-pins { > pins = "PG6", "PG7"; > @@ -447,6 +453,21 @@ mmc2: mmc@4022000 { > #size-cells = <0>; > }; > > + spi0: spi@4025000 { > + compatible = "allwinner,sun20i-d1-spi", > + "allwinner,sun50i-r329-spi"; > + reg = <0x04025000 0x300>; The manual (and the other DTs) use 4K, so please use that here as well. > + interrupts = ; > + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > + clock-names = "ahb", "mod"; > + dmas = <&dma 22>, <&dma 22>; > + dma-names = "rx", "tx"; > + resets = <&ccu RST_BUS_SPI0>; > + status = "disabled"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; I think we should add the second SPI controller here as well, using that DBI fallback compatible string. Above looks correct when compared to the manual. Thanks, Andre > + > usb_otg: usb@4100000 { > compatible = "allwinner,sun20i-d1-musb", > "allwinner,sun8i-a33-musb";