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Message-ID: <91b5cbb7-f3cf-c77d-faf4-bd1000f3e363@linaro.org>
Date:   Mon, 8 May 2023 09:46:16 +0200
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Subject: Re: [PATCH 1/3] arm64: dts: qcom: msm8916: correct LPASS CPU clocks
 order
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To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Vinod Koul <vkoul@kernel.org>, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20230507174516.264936-1-krzysztof.kozlowski@linaro.org>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <20230507174516.264936-1-krzysztof.kozlowski@linaro.org>
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On 7.05.2023 19:45, Krzysztof Kozlowski wrote:
> Re-order the clocks for LPASS CPU node to match the bindings (Linux
> driver takes by name):
> 
>   msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:1: 'mi2s-bit-clk0' was expected
>   msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:2: 'mi2s-bit-clk1' was expected
>   msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:3: 'mi2s-bit-clk2' was expected
>   msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:4: 'mi2s-bit-clk3' was expected
>   msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:5: 'pcnoc-mport-clk' was expected
>   msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:6: 'pcnoc-sway-clk' was expected
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index bf88c10ff55b..e7ae81296b20 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1520,20 +1520,20 @@ lpass: audio-controller@7708000 {
>  			 * Primary/Secondary MI2S both use the PRI_I2S_CLK.
>  			 */
>  			clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
> -				 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
> -				 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
>  				 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
>  				 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
>  				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
> -				 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
> +				 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>,
> +				 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
> +				 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>;
>  
>  			clock-names = "ahbix-clk",
> -					"pcnoc-mport-clk",
> -					"pcnoc-sway-clk",
>  					"mi2s-bit-clk0",
>  					"mi2s-bit-clk1",
>  					"mi2s-bit-clk2",
> -					"mi2s-bit-clk3";
> +					"mi2s-bit-clk3",
> +					"pcnoc-mport-clk",
> +					"pcnoc-sway-clk";
>  			#sound-dai-cells = <1>;
>  
>  			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;