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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id w6-20020ac25986000000b004f160559d4asm851538lfn.183.2023.05.08.04.32.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 May 2023 04:32:26 -0700 (PDT) Message-ID: Date: Mon, 8 May 2023 14:32:26 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH] clk: qcom: mmcc-msm8974: Add OXILICX_GDSC for msm8226 Content-Language: en-GB To: Konrad Dybcio , Luca Weiss , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Bartosz Dudziak Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230506-msm8226-oxilicx-v1-1-52e34b94ff22@z3ntu.xyz> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/05/2023 10:23, Konrad Dybcio wrote: > > > On 6.05.2023 23:20, Luca Weiss wrote: >> On msm8226 we also have OXILICX_GDSC but we need a slighly different >> config, with a .cxcs defined for clock but with no parent. > Hm, on newer (a5xx+) GPUs, CX needs to be turned on first and > to achieve that, we sometimes define it to be the GX's (also > implicitly known as "oxili-non-CX" in before-a6xx-times) parent.. > > Roughly speaking CX powers the "GPU hardware owned by the broader > SoC that may not need the GPU core clock to be up" and GX powers > the "GPU hardware owned strictly by the GPU that needs at least some > GPU clocks to be enabled" > > Maybe 8974 simply has a bug in the driver that would do the reverse? > Could you (and perhaps Dmitry on his shiny new 13yo board) test that > theory, preferably on both SoCs? > > --- a/drivers/clk/qcom/mmcc-msm8974.c > +++ b/drivers/clk/qcom/mmcc-msm8974.c > @@ -2431,6 +2431,7 @@ static struct gdsc oxili_gdsc = { > .pd = { > .name = "oxili", > }, > + .parent = &oxili_gdsc.pd, > .pwrsts = PWRSTS_OFF_ON, > }; Are you declaring oxili_gdsc to be a parent of itself? > > @@ -2439,7 +2440,6 @@ static struct gdsc oxilicx_gdsc = { > .pd = { > .name = "oxilicx", > }, > - .parent = &oxili_gdsc.pd, > .pwrsts = PWRSTS_OFF_ON, > }; > > Konrad >> >> Signed-off-by: Luca Weiss >> --- >> drivers/clk/qcom/mmcc-msm8974.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/clk/qcom/mmcc-msm8974.c b/drivers/clk/qcom/mmcc-msm8974.c >> index 4273fce9a4a4..39ee3953567c 100644 >> --- a/drivers/clk/qcom/mmcc-msm8974.c >> +++ b/drivers/clk/qcom/mmcc-msm8974.c >> @@ -2443,6 +2443,16 @@ static struct gdsc oxilicx_gdsc = { >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> +static struct gdsc oxilicx_gdsc_msm8226 = { >> + .gdscr = 0x4034, >> + .cxcs = (unsigned int []){ 0x4028 }, >> + .cxc_count = 1, >> + .pd = { >> + .name = "oxilicx", >> + }, >> + .pwrsts = PWRSTS_OFF_ON, >> +}; >> + >> static struct clk_regmap *mmcc_msm8226_clocks[] = { >> [MMSS_AHB_CLK_SRC] = &mmss_ahb_clk_src.clkr, >> [MMSS_AXI_CLK_SRC] = &mmss_axi_clk_src.clkr, >> @@ -2533,6 +2543,7 @@ static struct gdsc *mmcc_msm8226_gdscs[] = { >> [MDSS_GDSC] = &mdss_gdsc, >> [CAMSS_JPEG_GDSC] = &camss_jpeg_gdsc, >> [CAMSS_VFE_GDSC] = &camss_vfe_gdsc, >> + [OXILICX_GDSC] = &oxilicx_gdsc_msm8226, >> }; >> >> static const struct regmap_config mmcc_msm8226_regmap_config = { >> >> --- >> base-commit: dd9e11d6477a52ede9ebe575c83285e79e823889 >> change-id: 20230506-msm8226-oxilicx-7f3f0f8e491d >> >> Best regards, -- With best wishes Dmitry