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([2a01:e0a:982:cbb0:79ab:8da0:d16d:9990]) by smtp.gmail.com with ESMTPSA id e15-20020a5d4e8f000000b0030629536e64sm13492065wru.30.2023.05.09.00.44.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 May 2023 00:44:35 -0700 (PDT) Message-ID: Date: Tue, 9 May 2023 09:44:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v3 5/5] arm64: dts: meson: a1: support USB controller in OTG mode Content-Language: en-US To: Dmitry Rokosov , gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, mturquette@baylibre.com, vkoul@kernel.org, kishon@kernel.org, hminas@synopsys.com, Thinh.Nguyen@synopsys.com Cc: yue.wang@amlogic.com, hanjie.lin@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-phy@lists.infradead.org References: <20230426102922.19705-1-ddrokosov@sberdevices.ru> <20230426102922.19705-6-ddrokosov@sberdevices.ru> Organization: Linaro Developer Services In-Reply-To: <20230426102922.19705-6-ddrokosov@sberdevices.ru> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 26/04/2023 12:29, Dmitry Rokosov wrote: > Amlogic A1 SoC family has USB2.0 controller based on dwc2 and dwc3 > heads. It supports otg/host/peripheral modes. > > Signed-off-by: Yue Wang > Signed-off-by: Hanjie Lin > Signed-off-by: Dmitry Rokosov > --- > arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 59 +++++++++++++++++++++++ > 1 file changed, 59 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > index ae7d39cff07a..5588ee602161 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > @@ -8,6 +8,8 @@ > #include > #include > #include > +#include > +#include > > / { > compatible = "amlogic,a1"; > @@ -169,6 +171,17 @@ gpio_intc: interrupt-controller@0440 { > amlogic,channel-interrupts = > <49 50 51 52 53 54 55 56>; > }; > + > + usb2_phy1: phy@4000 { > + compatible = "amlogic,a1-usb2-phy"; > + clocks = <&clkc CLKID_USB_PHY_IN>; > + clock-names = "xtal"; > + reg = <0x0 0x4000 0x0 0x60>; > + resets = <&reset RESET_USBPHY>; > + reset-names = "phy"; > + #phy-cells = <0>; > + power-domains = <&pwrc PWRC_USB_ID>; > + }; > }; > > gic: interrupt-controller@ff901000 { > @@ -192,6 +205,52 @@ spifc: spi@fd000400 { > #size-cells = <0>; > status = "disabled"; > }; > + > + usb: usb@fe004400 { > + status = "disabled"; > + compatible = "amlogic,meson-a1-usb-ctrl"; > + reg = <0x0 0xfe004400 0x0 0xa0>; > + interrupts = ; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + clocks = <&clkc CLKID_USB_CTRL>, > + <&clkc CLKID_USB_BUS>, > + <&clkc CLKID_USB_CTRL_IN>; > + clock-names = "usb_ctrl", "usb_bus", "xtal_usb_ctrl"; > + resets = <&reset RESET_USBCTRL>; > + reset-name = "usb_ctrl"; > + > + dr_mode = "otg"; > + > + phys = <&usb2_phy1>; > + phy-names = "usb2-phy1"; > + > + dwc2: usb@ff500000 { > + compatible = "amlogic,meson-a1-usb", "snps,dwc2"; > + reg = <0x0 0xff500000 0x0 0x40000>; > + interrupts = ; > + phys = <&usb2_phy1>; > + phy-names = "usb2-phy"; > + clocks = <&clkc CLKID_USB_PHY>; > + clock-names = "otg"; > + dr_mode = "peripheral"; > + g-rx-fifo-size = <192>; > + g-np-tx-fifo-size = <128>; > + g-tx-fifo-size = <128 128 16 16 16>; > + }; > + > + dwc3: usb@ff400000 { > + compatible = "snps,dwc3"; > + reg = <0x0 0xff400000 0x0 0x100000>; > + interrupts = ; > + dr_mode = "host"; > + snps,dis_u2_susphy_quirk; > + snps,quirk-frame-length-adjustment = <0x20>; > + snps,parkmode-disable-ss-quirk; > + }; > + }; > }; > > timer { This patcj is fine, but depends on clock bindings & dt, so now Vinod took the PHY patch, please resend this wiyhout patches 1 & 5, then resend the DT patch later when the clock bindings is merged. Thanks, Neil