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Message-ID: <35f0c8d0-6681-4fb7-5f80-646687225d14@ti.com>
Date:   Tue, 9 May 2023 15:32:15 +0530
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Subject: Re: [EXTERNAL] Re: [PATCH] arm64: defconfig: enable PCIe controller
 on TI platforms
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To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Arnd Bergmann <arnd@arndb.de>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Bjorn Andersson <quic_bjorande@quicinc.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        =?UTF-8?B?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= 
        <nfraprado@collabora.com>, Mark Brown <broonie@kernel.org>,
        =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
        Nishanth Menon <nm@ti.com>, Milind Parab <mparab@cadence.com>,
        Swapnil Kashinath Jakhade <sjakhade@cadence.com>
CC:     <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, Achal Verma <a-verma1@ti.com>
References: <20230509063431.1203367-1-a-verma1@ti.com>
 <46b0dbd4-5695-1a2d-8d06-0a60a7c3a151@linaro.org>
 <de6432db-0da0-b535-1f44-04541116be8b@ti.com>
 <63dc3d1b-ba17-48ee-a02e-83b2903e360a@app.fastmail.com>
 <b48613f5-9442-5a41-34fb-760d9edf3682@ti.com>
 <2880d5bb-61ce-a4d7-f870-b5549a5d88f2@linaro.org>
From:   "Verma, Achal" <a-verma1@ti.com>
In-Reply-To: <2880d5bb-61ce-a4d7-f870-b5549a5d88f2@linaro.org>
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On 5/9/2023 3:01 PM, Krzysztof Kozlowski wrote:
> On 09/05/2023 11:19, Verma, Achal wrote:
>>
>> Hello,
>> On 5/9/2023 1:58 PM, Arnd Bergmann wrote:
>>> On Tue, May 9, 2023, at 10:08, Vignesh Raghavendra wrote:
>>>
>>>> Also, see [0] for history. We really want these to be
>>>> modules unless its necessary for bootup.
>>>>
>>>> You may want to revive [1] and get it to mainline
>>>>
>>>> [0]
>>>> https://lore.kernel.org/linux-arm-kernel/CAK8P3a2VSBvOn1o+q1PYZaQ6LS9U4cz+DZGuDbisHkwNs2dAAw@mail.gmail.com/
>>>> [1]
>>>> https://lore.kernel.org/linux-arm-kernel/20230110153805.GA1505901@bhelgaas/
>>>
>>> Agreed, that seems simple enough. Ideally these should even
>>> be removable modules, not just single-load but unremovable.
>>>
>>> Doing that may require changes to the cadence PCIe host
>>> code if that does not support unloading yet (I have not
>>> checked), but should not require any changes to the core
>>> PCIe host code that supports loadable/removable modules.
>>>
>>>        Arnd
>> So, my understanding is that following change is expected
>> +CONFIG_PCIE_CADENCE=m
>> +CONFIG_PCIE_CADENCE_HOST=m
>> +CONFIG_PCIE_CADENCE_EP=m
>> +CONFIG_PCI_J721E=m
>> +CONFIG_PCI_J721E_HOST=m
>> +CONFIG_PCI_J721E_EP=m
>> +CONFIG_PCI_EPF_NTB=m
>>
>> I also want to inform that pci_j721e.c is a single file with both host
>> and EP functionality, last attempt to build it as modules depending on
>> host or EP selected failed because of symbols dependency.
>> Refactoring of pci_j721e.c into common, host and EP specific files could
>> work similar to the Cadence driver, So I will follow this way and push
>> the changes.
>>
>> Please let me know if there are concerns.
> 
> Aren't HOST and EP just customizing main module?
Current pci-j721e driver is composed of host specific and endpoint 
specific code encapsulated in switch case and shared required common 
code, last attempt of putting endpoint and host specific code inside EP 
and HOST CONFIGS respectively failed (also reported by kernel test bot) 
when tried with different combinations of Y/M/N along with CADENCE 
driver on which pci-j721e depends, So only way is to break main module 
into common, host and endpoint files.
> 
> Best regards,
> Krzysztof
>