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Message-ID: <d95365c2-016a-9f04-3bea-77bb418b9b29@linaro.org>
Date:   Tue, 9 May 2023 22:17:37 +0200
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Subject: Re: [PATCH V4 3/3] arm64: dts: qcom: sm8450: Add video clock
 controller
Content-Language: en-US
To:     Taniya Das <quic_tdas@quicinc.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>
Cc:     Bjorn Andersson <andersson@kernel.org>,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        quic_skakitap@quicinc.com, quic_jkona@quicinc.com
References: <20230509172148.7627-1-quic_tdas@quicinc.com>
 <20230509172148.7627-4-quic_tdas@quicinc.com>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <20230509172148.7627-4-quic_tdas@quicinc.com>
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On 9.05.2023 19:21, Taniya Das wrote:
> Add device node for video clock controller on Qualcomm SM8450 platform.
> 
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> ---
> Changes since V3:
>  - None.
> 
> Changes since V2:
>  - No changes.
> 
> Changes since V1:
>  - No changes.
> 
>  arch/arm64/boot/dts/qcom/sm8450.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 595533aeafc4..00ff8efa53c7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -756,6 +756,18 @@
>  				      "usb3_phy_wrapper_gcc_usb30_pipe_clk";
>  		};
>  
> +		videocc: clock-controller@aaf0000 {
Nodes should be sorted by unit address.
This one belongs before cci@ac15000.

> +			compatible = "qcom,sm8450-videocc";
> +			reg = <0 0x0aaf0000 0 0x10000>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <&gcc GCC_VIDEO_AHB_CLK>;
Older SoCs used to provide a vote on XO_A for videocc ahb_clk_src,
I'd assume that's now taken care of internally?

Konrad
> +			power-domains = <&rpmhpd SM8450_MMCX>;
> +			required-opps = <&rpmhpd_opp_low_svs>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			#power-domain-cells = <1>;
> +		};
> +
>  		gpi_dma2: dma-controller@800000 {
>  			compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma";
>  			#dma-cells = <3>;