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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id a16-20020a62e210000000b006439df7ed5fsm2426977pfi.6.2023.05.09.18.26.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 May 2023 18:26:58 -0700 (PDT) Message-ID: <6bee2314-043d-e1af-016b-779df88f1868@gmail.com> Date: Wed, 10 May 2023 09:26:53 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 Subject: Re: [PATCH v10 10/10] tty: serial: Add Nuvoton ma35d1 serial driver support Content-Language: en-US To: Arnd Bergmann , =?UTF-8?Q?Ilpo_J=c3=a4rvinen?= Cc: Rob Herring , krzysztof.kozlowski+dt@linaro.org, Lee Jones , Michael Turquette , Stephen Boyd , Philipp Zabel , Greg Kroah-Hartman , Jiri Slaby , Tomer Maimon , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, LKML , linux-arm-kernel@lists.infradead.org, linux-serial , schung@nuvoton.com, mjchen@nuvoton.com, Jacky Huang References: <20230508025936.36776-1-ychuang570808@gmail.com> <20230508025936.36776-11-ychuang570808@gmail.com> <2ba483e9-267f-2159-1ea8-75a2618fcdf9@linux.intel.com> <72983689-0e98-4482-b549-ba2530274943@app.fastmail.com> From: Jacky Huang In-Reply-To: <72983689-0e98-4482-b549-ba2530274943@app.fastmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dear Arnd and Ilpo, Thank you for the comments. On 2023/5/9 下午 08:32, Arnd Bergmann wrote: > On Tue, May 9, 2023, at 14:25, Ilpo Järvinen wrote: >> On Tue, 9 May 2023, Arnd Bergmann wrote: >>> On Tue, May 9, 2023, at 12:17, Ilpo Järvinen wrote: >>>> On Mon, 8 May 2023, Jacky Huang wrote: >>>>> + >>>>> +#define UART_NR 17 >>>>> + >>>>> +#define UART_REG_RBR 0x00 >>>>> +#define UART_REG_THR 0x00 >>>>> +#define UART_REG_IER 0x04 >>>>> +#define UART_REG_FCR 0x08 >>>>> +#define UART_REG_LCR 0x0C >>>>> +#define UART_REG_MCR 0x10 >>>> These duplicate include/uapi/linux/serial_reg.h ones, use the std ones >>>> directly. >>>> >>>> Setup regshift too and use it in serial_in. >>> I think this came up in previous reviews, but it turned out that >>> only the first six registers are compatible, while the later >>> ones are all different, and it's not 8250 compatible. >> So use the normal name for compatible ones and HW specific names for the >> others? >> >> It might not be compatible in everything but surely 8250 influence is >> visible here and there. > I'd rename all of them and share nothing. I had the same thought as you > when I first looked at the driver, and thought of how we merged the omap > uart into 8250 for this reason, but after I found a datasheet for this > one, my impression was that it's a much more distant cousin of 8250 > than the others, > > There is clearly some family lineage, but there are differences > everywhere, and I don't think it was designed by extending a 8250 > compatible hardware block with extra features, but rather built > from scratch (sigh) based only loosely on a register description > but then extending it with no intent of retaining compatibility. > > Arnd Yes, the design of this UART IP is indeed incompatible with the 8250, but it does imitate the 8250 in some register and register bit field naming, and even in usage definitions, which can easily lead to misunderstandings. In order to distinguish it from the 8250 and make it clear that it has nothing to do with the 8250, I hope you can agree with me not to use the existing register and bit field definitions of the 8250 in this driver. In fact, this UART design has been used for more than 15 years and is used in our M0/M23/M4, ARM7/ARM9 MCUs and MPUs. The MA35 series will also continue to use this design. I will add the MA35_ prefix to all registers and bit fields, and make the modifications suggested by Ilpo that are unrelated to this 8250 issue. Best Regards, Jacky Huang