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Subject: RE: [PATCH v2 00/17] Add Nested Translation Support for SMMUv3
Thread-Topic: [PATCH v2 00/17] Add Nested Translation Support for SMMUv3
Thread-Index: AQHZgvBR+iZCoOJeVE+podSZNjH/ma9TJ1zQ
Date:   Wed, 10 May 2023 08:11:28 +0000
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> From: Nicolin Chen <nicolinc@nvidia.com>
> Sent: Wednesday, May 10, 2023 11:33 AM
>=20
> One unique requirement for SMMUv3 nested translation support is the MSI
> doorbell address translation, which is a 2-stage translation too. And,
> to working with the ITS driver, an msi_cookie needs to be setup on the
> kernel-managed domain, the stage-2 domain of the nesting setup. And the
> same msi_cookie will be fetched, via
> iommu_dma_get_msi_mapping_domain(),
> in the iommu core to allocate and creates IOVA mappings for MSI doorbell
> page(s). However, with the nesting design, the device is attached to a
> user-managed domain, the stage-1 domain. So both the setup and fetching
> of the msi_cookie would not work at the level of stage-2 domain. Thus,
> on both sides, the msi_cookie setup and fetching require a redirection
> of the domain pointer. It's easy to do so in iommufd core, but needs a
> new op in the iommu core and driver.
>=20

Looks the new preferred way is to map the physical ITS page to an IPA
provided by Qemu then let the guest allocate the cookie in S1 which
is then passed back by Qemu to the host kernel? [1]

[1] https://lore.kernel.org/linux-iommu/5ff0d72b-a7b8-c8a9-60e5-396e7a1ef36=
3@arm.com/