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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id m25-20020ac24259000000b004f13ca69dc8sm962020lfl.72.2023.05.10.21.31.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 May 2023 21:31:52 -0700 (PDT) Message-ID: <02797bdd-a292-5891-ce73-8a174d62ac7d@linaro.org> Date: Thu, 11 May 2023 07:31:52 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v6 3/8] drm/msm/dpu: test DPU_PINGPONG_DSC bit before assign DSC ops to PINGPONG Content-Language: en-GB To: Kuogee Hsieh , dri-devel@lists.freedesktop.org, robdclark@gmail.com, sean@poorly.run, swboyd@chromium.org, dianders@chromium.org, vkoul@kernel.org, daniel@ffwll.ch, airlied@gmail.com, agross@kernel.org, andersson@kernel.org Cc: quic_abhinavk@quicinc.com, quic_jesszhan@quicinc.com, quic_sbillaka@quicinc.com, marijn.suijten@somainline.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <1683756453-22050-1-git-send-email-quic_khsieh@quicinc.com> <1683756453-22050-4-git-send-email-quic_khsieh@quicinc.com> From: Dmitry Baryshkov In-Reply-To: <1683756453-22050-4-git-send-email-quic_khsieh@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/05/2023 01:07, Kuogee Hsieh wrote: > DPU < 7.0.0 has DPU_PINGPONG_DSC feature bit set to indicate it requires > both dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() to be > executed to complete DSC configuration if DSC hardware block is present. > Hence test DPU_PINGPONG_DSC feature bit and assign DSC related functions > to the ops of PINGPONG block accordingly if DPU_PINGPONG_DSC bit is set. > > changes in v6: > -- split patches and keep the function file handles DPU_PINGPONG_DSC bit at this patch Please correct me if I'm wrong, the overall suggestion was to have actual catalog changes before this patch. However I do not see this feature bit being enabled at all! > > Signed-off-by: Kuogee Hsieh > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c > index 79e4576..e7f47a4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c > @@ -295,6 +295,12 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, > c->ops.enable_dsc = dpu_hw_pp_dsc_enable; > c->ops.disable_dsc = dpu_hw_pp_dsc_disable; > > + if (test_bit(DPU_PINGPONG_DSC, &features)) { > + c->ops.setup_dsc = dpu_hw_pp_setup_dsc; > + c->ops.enable_dsc = dpu_hw_pp_dsc_enable; > + c->ops.disable_dsc = dpu_hw_pp_dsc_disable; > + } > + > if (test_bit(DPU_PINGPONG_DITHER, &features)) > c->ops.setup_dither = dpu_hw_pp_setup_dither; > }; -- With best wishes Dmitry