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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id v4-20020a197404000000b004f01ae1e63esm961363lfe.272.2023.05.10.21.49.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 May 2023 21:49:30 -0700 (PDT) Message-ID: <575d9fb6-15c4-1faf-8457-c5ae3f99895c@linaro.org> Date: Thu, 11 May 2023 07:49:29 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v6 2/8] drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0 Content-Language: en-GB To: Abhinav Kumar , Kuogee Hsieh , dri-devel@lists.freedesktop.org, robdclark@gmail.com, sean@poorly.run, swboyd@chromium.org, dianders@chromium.org, vkoul@kernel.org, daniel@ffwll.ch, airlied@gmail.com, agross@kernel.org, andersson@kernel.org Cc: quic_jesszhan@quicinc.com, quic_sbillaka@quicinc.com, marijn.suijten@somainline.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <1683756453-22050-1-git-send-email-quic_khsieh@quicinc.com> <1683756453-22050-3-git-send-email-quic_khsieh@quicinc.com> <1a6109ae-7c83-c04e-60c9-dfca6b83d662@quicinc.com> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/05/2023 07:42, Abhinav Kumar wrote: > > > On 5/10/2023 9:39 PM, Dmitry Baryshkov wrote: >> On 11/05/2023 07:38, Abhinav Kumar wrote: >>> >>> >>> On 5/10/2023 9:29 PM, Dmitry Baryshkov wrote: >>>> On 11/05/2023 01:07, Kuogee Hsieh wrote: >>>>> DPU < 7.0.0 requires the PINGPONG block to be involved during >>>>> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC >>>>> encoder engine moved to INTF with the help of the flush mechanism. >>>> >>>> Nit: was moved. >>>> >>>>> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of >>>>> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the >>>>> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not >>>>> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. >>>> >>>> this looks good >>>> >>>>> Existing call-sites to these callbacks already skip calling into >>>>> them if the function pointer is NULL. >>>> >>>> This is more relevant for patch 3 commit message. >>>> >>>>> Add DPU_PINGPONG_DSC feature >>>>> bit to all chipset with DPU < 7.0.0. >>>> >>>> This is incorrect, as we do not change the catalog in this patch. >>>> >>> >>> Sorry but why not? The changes done to dpu_hw_catalog.c do exactly that. >> >> Because the patch does not add this feature bit to any of the >> chipsets. I think the relevant patch was lost somewhere during the >> rework/rebase. >> >> >> > > This is adding it right? > >   #define PINGPONG_SDM845_MASK \ > -    (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) > +    (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | > BIT(DPU_PINGPONG_DSC)) >   #define PINGPONG_SDM845_TE2_MASK \ Ah, I see now. I was expecting changes to the actual catlog files. Please excuse me. As we are using PINGPONG_SDM845_MASK only up to and including DPU 6.x, this is correct. I'd then suggest rephrasing this sentence to be more explicit: Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, which is used for all DPU < 7.0 chipsets. -- With best wishes Dmitry