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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i70-20020a638749000000b0051b930ef847si6005537pge.134.2023.05.11.01.13.35; Thu, 11 May 2023 01:14:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234093AbjEKIGq (ORCPT + 99 others); Thu, 11 May 2023 04:06:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235448AbjEKIGa (ORCPT ); Thu, 11 May 2023 04:06:30 -0400 Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4C5D9A24E for ; Thu, 11 May 2023 01:06:21 -0700 (PDT) Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8Bx6en8oVxkPa0HAA--.13134S3; Thu, 11 May 2023 16:06:20 +0800 (CST) Received: from linux.localdomain (unknown [113.200.148.30]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxqjr5oVxk7XNVAA--.21787S3; Thu, 11 May 2023 16:06:19 +0800 (CST) From: Tiezhu Yang To: Huacai Chen , WANG Xuerui Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn Subject: [PATCH v4 1/6] LoongArch: Move three functions from kprobes.c to inst.c Date: Thu, 11 May 2023 16:06:07 +0800 Message-Id: <1683792372-29338-2-git-send-email-yangtiezhu@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1683792372-29338-1-git-send-email-yangtiezhu@loongson.cn> References: <1683792372-29338-1-git-send-email-yangtiezhu@loongson.cn> X-CM-TRANSID: AQAAf8Cxqjr5oVxk7XNVAA--.21787S3 X-CM-SenderInfo: p1dqw3xlh2x3gn0dqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjvJXoWxWFW8Wr13WryfJw13WFW8tFb_yoWrtFyUpF 47u3WfJr48WFn3XryDJw4Yvr1Fkrsa93sFqF13JayfKry2qr15tF1kKrZYvF98K3y2kr4I qF1Yyry5W3WfAaDanT9S1TB71UUUUUJqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b3AYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_JF0_JFyl8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l n4kS14v26r1Y6r17M2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6x ACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E 87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82 IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1l4IxYO2xFxVAFwI0_Jrv_JF1lx2Iq xVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r 126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY 6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67 AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuY vjxU4OzVUUUUU X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The functions insns_not_supported(), insns_need_simulation() and arch_simulate_insn() will be used for uprobes, move them from kprobes.c to inst.c, this is preparation for later patch, no functionality change. Signed-off-by: Tiezhu Yang --- arch/loongarch/include/asm/inst.h | 4 ++++ arch/loongarch/kernel/inst.c | 39 +++++++++++++++++++++++++++++++++ arch/loongarch/kernel/kprobes.c | 46 ++------------------------------------- 3 files changed, 45 insertions(+), 44 deletions(-) diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm/inst.h index b09887ff..c9e5435 100644 --- a/arch/loongarch/include/asm/inst.h +++ b/arch/loongarch/include/asm/inst.h @@ -435,6 +435,10 @@ static inline bool is_self_loop_ins(union loongarch_instruction *ip, struct pt_r void simu_pc(struct pt_regs *regs, union loongarch_instruction insn); void simu_branch(struct pt_regs *regs, union loongarch_instruction insn); +bool insns_not_supported(union loongarch_instruction insn); +bool insns_need_simulation(union loongarch_instruction insn); +void arch_simulate_insn(union loongarch_instruction insn, struct pt_regs *regs); + int larch_insn_read(void *addr, u32 *insnp); int larch_insn_write(void *addr, u32 insn); int larch_insn_patch_text(void *addr, u32 insn); diff --git a/arch/loongarch/kernel/inst.c b/arch/loongarch/kernel/inst.c index 258ef26..6f61956 100644 --- a/arch/loongarch/kernel/inst.c +++ b/arch/loongarch/kernel/inst.c @@ -133,6 +133,45 @@ void simu_branch(struct pt_regs *regs, union loongarch_instruction insn) } } +bool insns_not_supported(union loongarch_instruction insn) +{ + switch (insn.reg2i14_format.opcode) { + case llw_op: + case lld_op: + case scw_op: + case scd_op: + pr_notice("ll and sc instructions are not supported\n"); + return true; + } + + switch (insn.reg1i21_format.opcode) { + case bceqz_op: + pr_notice("bceqz and bcnez instructions are not supported\n"); + return true; + } + + return false; +} + +bool insns_need_simulation(union loongarch_instruction insn) +{ + if (is_pc_ins(&insn)) + return true; + + if (is_branch_ins(&insn)) + return true; + + return false; +} + +void arch_simulate_insn(union loongarch_instruction insn, struct pt_regs *regs) +{ + if (is_pc_ins(&insn)) + simu_pc(regs, insn); + else if (is_branch_ins(&insn)) + simu_branch(regs, insn); +} + int larch_insn_read(void *addr, u32 *insnp) { int ret; diff --git a/arch/loongarch/kernel/kprobes.c b/arch/loongarch/kernel/kprobes.c index 56c8c4b..08c78d2 100644 --- a/arch/loongarch/kernel/kprobes.c +++ b/arch/loongarch/kernel/kprobes.c @@ -21,48 +21,6 @@ static const union loongarch_instruction singlestep_insn = { DEFINE_PER_CPU(struct kprobe *, current_kprobe); DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); -static bool insns_not_supported(union loongarch_instruction insn) -{ - switch (insn.reg2i14_format.opcode) { - case llw_op: - case lld_op: - case scw_op: - case scd_op: - pr_notice("kprobe: ll and sc instructions are not supported\n"); - return true; - } - - switch (insn.reg1i21_format.opcode) { - case bceqz_op: - pr_notice("kprobe: bceqz and bcnez instructions are not supported\n"); - return true; - } - - return false; -} -NOKPROBE_SYMBOL(insns_not_supported); - -static bool insns_need_simulation(struct kprobe *p) -{ - if (is_pc_ins(&p->opcode)) - return true; - - if (is_branch_ins(&p->opcode)) - return true; - - return false; -} -NOKPROBE_SYMBOL(insns_need_simulation); - -static void arch_simulate_insn(struct kprobe *p, struct pt_regs *regs) -{ - if (is_pc_ins(&p->opcode)) - simu_pc(regs, p->opcode); - else if (is_branch_ins(&p->opcode)) - simu_branch(regs, p->opcode); -} -NOKPROBE_SYMBOL(arch_simulate_insn); - static void arch_prepare_ss_slot(struct kprobe *p) { p->ainsn.insn[0] = *p->addr; @@ -89,7 +47,7 @@ int arch_prepare_kprobe(struct kprobe *p) if (insns_not_supported(p->opcode)) return -EINVAL; - if (insns_need_simulation(p)) { + if (insns_need_simulation(p->opcode)) { p->ainsn.insn = NULL; } else { p->ainsn.insn = get_insn_slot(); @@ -220,7 +178,7 @@ static void setup_singlestep(struct kprobe *p, struct pt_regs *regs, regs->csr_era = (unsigned long)p->ainsn.insn; } else { /* simulate single steping */ - arch_simulate_insn(p, regs); + arch_simulate_insn(p->opcode, regs); /* now go for post processing */ post_kprobe_handler(p, kcb, regs); } -- 2.1.0